ARM: at91/dt: define sama5d3 clocks

Define sama5d3 clocks in sama5d3 device tree.
Add references to the appropriate clocks in each peripheral.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM: at91/dt: define sama5d3xek's main clk frequency

Define the main clock frequency for the new main clock node
in sama5d3xcm.dtsi.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM: at91: move sama5d3 SoC to common clk

This patch removes the selection of AT91_USE_OLD_CLK when selecting sama5d3
SoC support. This will enable automatically enable COMMON_CLK_AT91 option
and add support for at91 common clk implementation.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM: at91/dt: remove old clk material

This patch removes the old main clk node which is now useless as sama5d3
SoCs and boards are no longer compatible with the old at91 clk
implementations.

It also remove old clock definitions (clock definitions using at91 old clk
framework).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
clk: add clk accuracy retrieval support

The clock accuracy is expressed in ppb (parts per billion) and represents
the possible clock drift.
Say you have a clock (e.g. an oscillator) which provides a fixed clock of
20MHz with an accuracy of +- 20Hz. This accuracy expressed in ppb is
20Hz/20MHz = 1000 ppb (or 1 ppm).

Clock users may need the clock accuracy information in order to choose
the best clock (the one with the best accuracy) across several available
clocks.

This patch adds clk accuracy retrieval support for common clk framework by
means of a new function called clk_get_accuracy.
This function returns the given clock accuracy expressed in ppb.

In order to get the clock accuracy, this implementation adds one callback
called recalc_accuracy to the clk_ops structure.
This callback is given the parent clock accuracy (if the clock is not a
root clock) and should recalculate the given clock accuracy.

This callback is optional and may be implemented if the clock is not
a perfect clock (accuracy != 0 ppb).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
clk: add accuracy support for fixed clock

This patch adds support for accuracy retrieval on fixed clocks.
It also adds a new dt property called 'clock-accuracy' to define the clock
accuracy.

This can be usefull for oscillator (RC, crystal, ...) definitions which are
always given an accuracy characteristic.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
clk: at91: rework main clk implementation

AT91 main clk is actually a clk multiplexer and not a simple fixed rate clk
as currently implemented.

In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can
choose accross 2 source clks : an internal RC oscillator and an external
crystal oscillator using the MOR register.

In other Socs (sam9260, rm9200 families) the multiplexer source is
hardcoded to the external crystal oscillator.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
clk: at91: add slow clks driver

AT91 slow clk is a clk multiplexer.

In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can
choose accross 2 source clks : an internal RC oscillator and an external
crystal oscillator using the MOR register.

In other Socs (sam9260 family) the multiplexer source is hardcoded with
the OSCSEL signal.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
ARM: at91/dt: rework sama5d3 main clk dt subtree

Replace the old main clk definition (fixed rate clk) by the new main clk
subtree definition (mainck = mux(mainrcorsc, mainxtalosc)).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
ARM: at91/dt: rework sama5d3 slow clk dt subtree

Replace the old slow clk definition (fixed rate clk) by the new slow clk
subtree definition (slowck = mux(slowrcorsc, slowxtalosc)).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
USB: ehci-atmel: add usb_clk for transition to CCF

The AT91 PMC (Power Management Controller) provides a USB clock used by
the different USB controllers (ehci, ohci and udc).
The atmel-ehci driver must configure the usb clock rate to 48Mhz in order
to get a fully functionnal USB host controller.
This configuration was formely done in mach-at91/clock.c, but will be
bypassed when moving to common clk framework.

This patch adds support for usb clock retrieval and configuration only if
CCF is enabled (CONFIG_COMMON_CLK).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
ARM: at91/tc/clocksource: replace clk_enable/disable with clk_prepare_enable/disable_unprepare.

Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to
avoid common clk framework warnings.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>