msm_fb: display: change TE simulation and read pointer interrupt timing

The current parameters for command mode TE simulation on mdp side are
not straightforward and cause double read pointer interrupts. Now make
read pointer interrupt and line counter reset happen right at h/w
vsync, and kick_off start position and height are set to back porch
and max respectively, so timing is much simplified and the chance of
tearing is reduced.

CRs-fixed: 463273
Change-Id: Ia25710556bc2b031cdfaaf08fee034baab33d124
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: Correct R and G offsets for correct mapping

R and G colors are swapped when ARGC test cases are executed.
Correct the color mapping to right register offset to fix
the color swapping issue.

CRs-Fixed: 491215

Change-Id: I4997acce577bdbbdf39e22502a678dbecf0bfc37
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
msm: display: Proper handling of prepare and unprepare clocks

This change handles prepare and unprepare clocks properly to
fix clock mismatches.

Change-Id: I09986aa1f0e1a5be2e07655a1db0d23760dd0725
Signed-off-by: Sangani Suryanarayana Raju <csuryan@codeaurora.org>
msm: HTC: m7: update panel parameters for vsync

Change-Id: If1b82f4b9db1b934bf59dc40a9487fde0e492bee