ioat: Fix DMA memory sync direction correct flag

ioat does DMA memory sync with DMA_TO_DEVICE direction on a buffer allocated
for DMA_FROM_DEVICE dma, resulting in the following warning from dma debug.
Fixed the dma_sync_single_for_device() call to use the correct direction.

[  226.288947] WARNING: at lib/dma-debug.c:990 check_sync+0x132/0x550()
[  226.288948] Hardware name: ProLiant DL380p Gen8
[  226.288951] ioatdma 0000:00:04.0: DMA-API: device driver syncs DMA memory with different direction [device address=0x00000000ffff7000] [size=4096 bytes] [mapped with DMA_FROM_DEVICE] [synced with DMA_TO_DEVICE]
[  226.288953] Modules linked in: iTCO_wdt(+) sb_edac(+) ioatdma(+) microcode serio_raw pcspkr edac_core hpwdt(+) iTCO_vendor_support hpilo(+) dca acpi_power_meter ata_generic pata_acpi sd_mod crc_t10dif ata_piix libata hpsa tg3 netxen_nic(+) sunrpc dm_mirror dm_region_hash dm_log dm_mod
[  226.288967] Pid: 1055, comm: work_for_cpu Tainted: G        W    3.3.0-0.20.el7.x86_64 #1
[  226.288968] Call Trace:
[  226.288974]  [<ffffffff810644cf>] warn_slowpath_common+0x7f/0xc0
[  226.288977]  [<ffffffff810645c6>] warn_slowpath_fmt+0x46/0x50
[  226.288980]  [<ffffffff81345502>] check_sync+0x132/0x550
[  226.288983]  [<ffffffff81345c9f>] debug_dma_sync_single_for_device+0x3f/0x50
[  226.288988]  [<ffffffff81661002>] ? wait_for_common+0x72/0x180
[  226.288995]  [<ffffffffa019590f>] ioat_xor_val_self_test+0x3e5/0x832 [ioatdma]
[  226.288999]  [<ffffffff811a5739>] ? kfree+0x259/0x270
[  226.289004]  [<ffffffffa0195d77>] ioat3_dma_self_test+0x1b/0x20 [ioatdma]
[  226.289008]  [<ffffffffa01952c3>] ioat_probe+0x2f8/0x348 [ioatdma]
[  226.289011]  [<ffffffffa0195f51>] ioat3_dma_probe+0x1d5/0x2aa [ioatdma]
[  226.289016]  [<ffffffffa0194d12>] ioat_pci_probe+0x139/0x17c [ioatdma]
[  226.289020]  [<ffffffff81354b8c>] local_pci_probe+0x5c/0xd0
[  226.289023]  [<ffffffff81083e50>] ? destroy_work_on_stack+0x20/0x20
[  226.289025]  [<ffffffff81083e68>] do_work_for_cpu+0x18/0x30
[  226.289029]  [<ffffffff8108d997>] kthread+0xb7/0xc0
[  226.289033]  [<ffffffff8166cef4>] kernel_thread_helper+0x4/0x10
[  226.289036]  [<ffffffff81662d20>] ? _raw_spin_unlock_irq+0x30/0x50
[  226.289038]  [<ffffffff81663234>] ? retint_restore_args+0x13/0x13
[  226.289041]  [<ffffffff8108d8e0>] ? kthread_worker_fn+0x1a0/0x1a0
[  226.289044]  [<ffffffff8166cef0>] ? gs_change+0x13/0x13
[  226.289045] ---[ end trace e1618afc7a606089 ]---
[  226.289047] Mapped at:
[  226.289048]  [<ffffffff81345307>] debug_dma_map_page+0x87/0x150
[  226.289050]  [<ffffffffa019653c>] dma_map_page.constprop.18+0x70/0xb34 [ioatdma]
[  226.289054]  [<ffffffffa0195702>] ioat_xor_val_self_test+0x1d8/0x832 [ioatdma]
[  226.289058]  [<ffffffffa0195d77>] ioat3_dma_self_test+0x1b/0x20 [ioatdma]
[  226.289061]  [<ffffffffa01952c3>] ioat_probe+0x2f8/0x348 [ioatdma]

Signed-off-by: Shuah Khan <shuah.khan@hp.com>
CC: <stable@vger.kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
[media] coda: Fix build due to iram.h rename

commit c045e3f13 (ARM: imx: include iram.h rather than mach/iram.h) changed the
location of iram.h, which causes the following build error when building the coda
driver:

drivers/media/platform/coda.c:27:23: error: mach/iram.h: No such file or directory
drivers/media/platform/coda.c: In function 'coda_probe':
drivers/media/platform/coda.c:2000: error: implicit declaration of function 'iram_alloc'
drivers/media/platform/coda.c:2001: warning: assignment makes pointer from integer without a cast
drivers/media/platform/coda.c: In function 'coda_remove':
drivers/media/platform/coda.c:2024: error: implicit declaration of function 'iram_free'

Since the content of iram.h is not imx specific, move it to
include/linux/platform_data/imx-iram.h instead. This is an intermediate solution
until the i.MX iram allocator is converted to the generic SRAM allocator.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com>
arm: mvebu: use global interrupts for GPIOs on Armada XP

The Armada XP GPIO controller has two ways of notifying interrupts:
using global interrupts or using per-CPU interrupts. In an attempt to
use the best available features, the 'marvell,armadaxp-gpio'
compatible string selects a variant of the gpio-mvebu driver that
makes use of the per-CPU interrupts.

Unfortunately, this doesn't work properly in a SMP context, because we
fall into cases where the GPIO interrupt is enabled on CPU X at the
GPIO controller level, but on CPU Y at the interrupt controller
level. It is not yet clear how to fix that easily.

So for 3.8, our approach is to switch to global interrupts for GPIOs,
so that we do not fall into this per-CPU interrupts problem.

This patch therefore fixes GPIO interrupts on Armada XP
platforms. Without this patch, GPIO interrupts simply do not work
reliably, because their proper operation depends on which CPU the code
requesting the interrupt is running.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
dmaengine: imx-dma: Disable use of hw_chain to fix sg_dma transfers.

HW chaining is currently broken in imx-dma. It can be easily reproduced doing
intensive accesses to a external MMC card and checking how the file system
is corrupted.

Preventing the driver to use HW chaining solves these issues.

Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
dma: tegra: implement flags parameters for cyclic transfer

The flag parameter is added in the cyclic transfer request.
Use the flag option of:
- DMA_PREP_INTERRUPT for enabling interrupt.
- DMA_CTRL_ACK for deciding whether ack is requred or not for
  descriptor.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
CC: <stable@vger.kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
ARM: Kirkwood: fix ns2 gpios by converting to pinctrl

Note that the pinctrl conversion also fixes GPIO support for ns2 boards.
Since commit f9e75922: "ARM: Kirkwood: Make use of mvebu pincltl and
gpio", the mvbu_gpio driver is used for DT boards. As mvbu_gpio relies
on the pinctrl driver, then a pinctrl definition must be given to allow
the GPIO configuration.

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: Dove: add Cubox sdhci card detect gpio

Card detect for sdhci on Cubox is connected to the wrong pin
(sdio1_cd instead of sdio0_cd). With support for cd-gpios and
pinctrl add the corresponding properties to DT for Cubox.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arm: mvebu: Fix memory size for Armada 370 DB

Actually the Armada 370 DB (aka DB-88F6710-BP-DDR3) come with 1GB and
not 512MB.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: virt: Avoid bx instruction for compatibility with <=ARMv4

Non-T variants of ARMv4 do not support the bx instruction.

However, __hyp_stub_install is always called from the same
instruction set used to build the bulk of the kernel, so bx should
not be necessary.

This patch uses the traditional "mov pc" instead of bx.

Cc: <stable@vger.kernel.org>
Signed-off-by: Dave Martin <dave.martin@linaro.org>
[will: fixed up remaining bx instruction]
Signed-off-by: Will Deacon <will.deacon@arm.com>
ARM: virt: boot secondary CPUs through the right entry point

Secondary CPUs should use the __hyp_stub_install_secondary entry
point, so boot mode inconsistencies can be detected.

Cc: <stable@vger.kernel.org>
Acked-by: Dave Martin <dave.martin@linaro.org>
Reported-by: Ian Molton <ian.molton@collabora.co.uk>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
ARM: virt: simplify __hyp_stub_install epilog

__hyp_stub_install duplicates quite a bit of safe_svcmode_maskall
by forcing the CPU back to SVC. This is unnecessary, as
safe_svcmode_maskall is called just after.

Furthermore, the way we build SPSR_hyp is buggy as we fail to mask
the interrupts, leading to interesting behaviours on TC2 + UEFI.

The fix is to simply remove this code and rely on safe_svcmode_maskall
to do the right thing.

Cc: <stable@vger.kernel.org>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Reported-by: Harry Liebel <harry.liebel@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
ARM: imx: fix build error with !CONFIG_SMP

Commit 68b2532 (ARM: imx: select HAVE_IMX_SRC when SMP is enabled)
introduces a build error with imx_v6_v7_defconfig when CONFIG_SMP is
deselected.

  LINK    vmlinux
  LD      vmlinux.o
  MODPOST vmlinux.o
  GEN     .version
  CHK     include/generated/compile.h
  UPD     include/generated/compile.h
  CC      init/version.o
  LD      init/built-in.o
arch/arm/mach-imx/built-in.o: In function `imx6q_restart':
platform-ahci-imx.c:(.text+0x448c): undefined reference to `imx_src_prepare_restart'
arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter':
platform-ahci-imx.c:(.text+0x4544): undefined reference to `imx_set_cpu_jump'
arch/arm/mach-imx/built-in.o: In function `imx6q_init_irq':
platform-ahci-imx.c:(.init.text+0xbef0): undefined reference to `imx_src_init'
make[1]: *** [vmlinux] Error 1

While the commit adds 'def_bool y if SMP' for HAVE_IMX_SRC, it should
not remove 'select HAVE_IMX_SRC' from SOC_IMX6Q, as the IMX6Q UP build
also needs HAVE_IMX_SRC.  Add the HAVE_IMX_SRC select back for SOC_IMX6Q
to fix above build error.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Merge tag 'mvebu_fixes_for_v3.8-rc3' of git://git.infradead.org/users/jcooper/linux into fixes

From Jason Cooper:
mvebu fixes for v3.8-rc3
 - gpio fixes in mvebu, kirkwood, and dove
 - small DT fix for mvebu (correct RAM size)

* tag 'mvebu_fixes_for_v3.8-rc3' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: Fix memory size for Armada 370 DB
  ARM: Dove: add Cubox sdhci card detect gpio
  ARM: Kirkwood: fix ns2 gpios by converting to pinctrl
  arm: mvebu: use global interrupts for GPIOs on Armada XP
ARM: integrator: move syscon remap for AP PCIv3

The Integrator/AP syscon remapping was done in the .setup()
function rather than .preinit() which is wrong - .preinit()
is called before .setup() and the former also use the syscon
base and cause a crash since it was not yet remapped.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
arm: mvebu: Fix compile for multiplatform when ARMv6 is selected

Some systems compile in both ARMv6 and ARMv7 into multiplatform
configurations. This means the default compiler flags are for ARMv6,
and we will get:

arch/arm/mach-mvebu/coherency_ll.S: Assembler messages:
arch/arm/mach-mvebu/coherency_ll.S:45: Error: selected processor does not support `dsb'

Fix this by specifying ARMv7 flags for coherency_ll.o.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM: imx: platform-imx-fb: modifies platform device name

Framebuffer platform device is now identified by a device id (imx1-fb or
imx21-fb) instead of by driver name (imx-fb).

Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
video: imxfb: fix imxfb_info configuration order

The devtype field for fbi (struct imxfb_info) must be set after memset call to
avoid some wrong behaviour (pixel size).

Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ARM: imx: disable cpu in .cpu_kill hook

It's buggy to disable the cpu that is being hot-unplugged in .cpu_die
hook which runs on the cpu itself.  Instead, it should be done in
.cpu_kill which runs on the thread (another cpu) that asks for shutting
down the cpu.  Move imx_enable_cpu(cpu, false) call into .cpu_kill
hook, and leave the cpu to be hot-unplugged in WFI within .cpu_die,
so that we can get a more stable cpu hot-plug operation.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ARM: imx: correct low-power mode setting

The hardware reset value of bit CCM_CLPCR_LPM enables WAIT mode
(WAIT_UNCLOCKED) by default.  However this is undesirable because
WAIT mode should only be enabled when there is a driver managing
ARM clock gating.  Correct the initial power mode to WAIT_CLOCKED
(disable WAIT mode).  While at it, the power mode after resuming
is also set back to WAIT_CLOCKED from STOP_POWER_OFF.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Btrfs: fix memory leak in name_cache_insert()

We should free name_cache_entry before returning from the
error handling code.

Signed-off-by: Tsutomu Itoh <t-itoh@jp.fujitsu.com>