Wrap.h: Define wrap / unwrap function for ExecutionEngine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180112 91177308-0d34-0410-b5e6-96231b3b80d8
Write relocations in yaml2obj.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180115 91177308-0d34-0410-b5e6-96231b3b80d8
Add some constraints to use of 'returned':

1) Disallow 'returned' on parameter that is also 'sret' (no sensible semantics, as far as I can tell).
2) Conservatively disallow tail calls through 'returned' parameters that also are 'zext' or 'sext' (for consistency with treatment of other zero-extending and sign-extending operations in tail call position detection...can be revised later to handle situations that can be determined to be safe).

This is a new attribute that is not yet used, so there is no impact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180118 91177308-0d34-0410-b5e6-96231b3b80d8
Call the potentially costly isAnnotatedParallel() only once. 
Made the uniform write test's checks a bit stricter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180119 91177308-0d34-0410-b5e6-96231b3b80d8
Hexagon: Remove duplicate instructions to handle global/immediate values
for absolute/absolute-set addressing modes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180120 91177308-0d34-0410-b5e6-96231b3b80d8
LoopVectorizer: Fix 15830. When scalarizing and unrolling stores make sure that the order in which the elements are scalarized is the same as the original order.
This fixes a miscompilation in FreeBSD's regex library.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180121 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Add CF_END

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180123 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Use .AMDGPU.config section to emit stacksize

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180124 91177308-0d34-0410-b5e6-96231b3b80d8
Testing for _XCR_XFEATURE_ENABLED_MASK instead of a specific MSVC version because some MSVC 2010 SP1 installations do not have the _xgetbv intrinsic.  Patch thanks to Serge Pavlov!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180125 91177308-0d34-0410-b5e6-96231b3b80d8
DAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without first checking the target's vector boolean contents.
This exposed an issue with PowerPC AltiVec where it appears it was setting the wrong vector boolean contents.  The included change
fixes the PowerPC tests, and was OK'd by Hal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180129 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Compare splat value with element size instead of calling isUIntN.

No intended changes in functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180130 91177308-0d34-0410-b5e6-96231b3b80d8
Change commentary for PowerPC Boolean vector contents.

No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180131 91177308-0d34-0410-b5e6-96231b3b80d8
Hexagon: Remove assembler mapped instruction definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180133 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify yaml2obj a bit.

The COFFParser now contains only a COFFYAML::Object and the string table
(which is recomputed, not serialized).

The structs in COFFParser now all begin with a Header field with what is
actually on the COFF object. The other fields are things that are semantically
part of the struct (relocations in a section for exmaple), but are not actually
represented that way in the object file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180134 91177308-0d34-0410-b5e6-96231b3b80d8
Lowercase "is" boolean variable prefix for consistency within function, no functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180136 91177308-0d34-0410-b5e6-96231b3b80d8
Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180137 91177308-0d34-0410-b5e6-96231b3b80d8
Add more tests for r179925 to verify correct handling of signext/zeroext; strengthen condition check to require actual MVT::i32 virtual register types, just in case (no actual functionality change)


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Make sure the instruction right after an inlined function has a
debug location. This solves a problem where range of an inlined
subroutine is emitted wrongly.
Patch by Manman Ren.

Fixes rdar://problem/12415623

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180140 91177308-0d34-0410-b5e6-96231b3b80d8
Hexagon: Define relations for GP-relative instructions.

No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180144 91177308-0d34-0410-b5e6-96231b3b80d8
Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180145 91177308-0d34-0410-b5e6-96231b3b80d8