Add i/o error counters to hastd(8) and make hastctl(8) display
them.  This may be useful for detecting problems with HAST disks.

Discussed with and reviewed by:	pjd
MFC after:	1 week
Get rid of unused struct member.

Pointed out by:	Gopakumar T
Obtained from:	NetApp
After r237012, the fdgrowtable() doesn't drop the filedesc lock anymore,
so update a stale comment.

Reviewed by:	kib, keramida
Style.

Suggested by:	kib
In all situations where we need to bootstrap yacc, we also need to
bootstrap liby.  This was not readily apparent, because a normal 'make
buildworld' or 'make toolchain' builds liby before building anything
that uses yacc.  However, 'make kernel-toolchain' does not build
headers or libraries, so it was not possible to build a kernel from
head on, say, stable/9 without first building the complete toolchain.

MFC after:	1 week
Begin adding support to explicitly set the current chainmask.

Right now the only way to set the chainmask is to set the hardware
configured chainmask through capabilities.  This is fine for forcing
the chainmask to be something other than what the hardware is capable
of (eg to reduce TX/RX to one connected antenna) but it does change what
the HAL hardware chainmask configuration is.

For operational mode changes, it (may?) make sense to separately control
the TX/RX chainmask.

Right now it's done as part of ar5416_reset.c - ar5416UpdateChainMasks()
calculates which TX/RX chainmasks to enable based on the operating mode.
(1 for legacy and whatever is supported for 11n operation.)  But doing
this in the HAL is suboptimal - the driver needs to know the currently
configured chainmask in order to correctly enable things for each
TX descriptor.  This is currently done by overriding the chainmask
config in the ar5416 TX routines but this has to disappear - the AR9300
HAL support requires the driver to dynamically set the TX chainmask based
on the TX power and TX rate in order to meet mini-PCIe slot power
requirements.

So:

* Introduce a new HAL method to set the operational chainmask variables;
* Introduce null methods for the previous generation chipsets;
* Add new driver state to record the current chainmask separate from
  the hardware configured chainmask.

Part #2 of this will involve disabling ar5416UpdateChainMasks() and moving
it into the driver; as well as properly programming the TX chainmask
based on the currently configured HAL chainmask.

Tested:

* AR5416, STA mode - both legacy (11a/11bg) and 11n rates - verified
  that AR_SELFGEN_MASK (the chainmask used for self-generated frames like
  ACKs and RTSes) is correct, as well as the TX descriptor contents is
  correct.
Part #2 of the TX chainmask changes:

* Remove ar5416UpdateChainmasks();
* Remove the TX chainmask override code from the ar5416 TX descriptor
  setup routines;
* Write a driver method to calculate the current chainmask based on the
  operating mode and update the driver state;
* Call the HAL chainmask method before calling ath_hal_reset();
* Use the currently configured chainmask in the TX descriptors rather than
  the hardware TX chainmasks.

Tested:

* AR5416, STA/AP mode - legacy and 11n modes
cxgbe(4): Update firmware to 1.8.4.0.

MFC after:	5 days
Revise the comment describing uma_zone_reserve_kva().

Sponsored by:	EMC / Isilon Storage Division
Reviewed by:	attilio
cxgbe(4): Ask the card's firmware to pad up tiny CPLs by encapsulating
them in a firmware message if it is able to do so.  This works out
better for one of the FIFOs in the chip.

MFC after:	5 days
Revert wrongly added asserts: lookup and remove from the collection
of cached pages doesn't require the object lock to be held.

Sponsored by:	EMC / Isilon storage division
Vendor import of expat 2.1.0 (trimmed).
Update base system libexpat to 2.1.0.

MFC after:	3 days
Merge from vmobj-rwlock branch:
Remove unused inclusion of vm/vm_pager.h and vm/vnode_pager.h.

Sponsored by:	EMC / Isilon storage division
Tested by:	pho
Reviewed by:	alc
MFC
As VM_OBJECT_SLEEP() is a vm_object_t specific function, make
the passed object as the first argument of the function for consistency.

Sponsored by:	EMC / Isilon storage revision
Expose timespec and timeval macros when __BSD_VISIBLE is defined.  This
allows userland application to use the following macros:

	timespecclear, timespecisset, timespeccmp, timespecadd,
	timespecsub;

	timevalclear, timevalisset, timevalcmp.

MFC after:	1 month
Adjust the arm kernel entry point address properly regardless of whether the
e_entry field holds a physical or a virtual address.  Add a comment block
that explains the assumptions being made by the adjustment code.
RPi users might want to touch the boot partition, which is always FAT
formatted on this board, so compile-in MSDOSFS.

Comment out the compiled-in FDT and explain why.
Update a comment: noobj_alloc() has replaced obj_alloc(), but it doesn't
really make sense for this comment to name specific backend allocators,
instead simply refer to backend allocators.

Sponsored by:	EMC / Isilon Storage Division