nr_segments and nr_rambuf_pool are changed to u32

div64_u64_rem are not available before 3.12
these values are enough as 32 bit since
number of caches are 32 bit which limits these values' bitwide
Change TODO
Remove cache_nr(u32) aliasing

The bit wide should be explicit for readability.
That cache_nr is 32bit wide is not obvious
TODO change

metablock_device should be at most 14 bytes.
So, only 4G times lap is allowed.
We don't need this check?
Remove flush_wait_queue. Just use schedule_timeout_interruptile as
other daemons

wait_even_* loops to wait for the condition turns to true.
This wastes CPU.
We wakes up the flush daemon in queue_flushing
and this is enough.
Double checking the flush queue list is empty
is just a duplication of the codes.
The amount of RAM buffer pool is configurable

Some system doesn't have much memory.
For the same reason segment_size_order became configurable
this should be parameterized.
The default 64MB is surpressing in a 32bit system.

Also, segment_size_order and this value
are optional now.
Added ARG_EXIST macro for this purpose.

If the RAM buffer pool became resizable
is the question remains.
Do we remove this parameter in that case?
Maybe setting the amount to 2MB is enough.
FIX: two thread booleans to dm_safe_io corrected
FIX: ctr comment