Tidy up. Trailing whitespace.
Clean up code format a bit.
ARM: Creating a vector from a lane of another.

The VDUP instruction source register doesn't allow a non-constant lane
index, so make sure we don't construct a ARM::VDUPLANE node asking it to
do so.

rdar://13328063
http://llvm.org/bugs/show_bug.cgi?id=13963