Optimisations

I have some more optimisations for your master branch. I don't yet know their speed-up value, though.

Summary:

* Move GB registers to a new struct, `struct Registers`, and instantiate one as gbRegs in the ARM9's DTCM. Register "numbers" are also modified from `reg8[(opcode>>3)&7]` to `numberedGbReg((opcode>>3)&7)`; they become structure offsets, not pointers, for possible improvement.
* Profile-directed opcode change: Use new faster versions of readMemory and writeMemory just for IO registers (Game Boy memory map FFxx hex), and use them in the `ld a,($ff00+nn)` and `ld ($ff00+nn),a` opcodes.

Still to master, won't really apply that well to asmcore. If you notice sizeable improvements using this code on master and would like me to try it out on asmcore, I will try.