reset: add non CONFIG_RESET_CONTROLLER routines

Some drivers are shared between platforms that may or may not
have RESET_CONTROLLER selected for them. Add dummy functions
when RESET_CONTROLLER is not selected, thereby eliminating the
need for drivers to enclose reset_control_*() calls within
#ifdef CONFIG_RESET_CONTROLLER, #endif
net: stmmac: Enable stmmac main clock when probing hardware

Guiseppe previously stated that the "stmmaceth" clock is the main clock
that drives the IP. The stmmac driver does not enable this clock during
the probe phase. If the clock was not enabled by the boot loader or
disabled by the kernel, hardware features and the MDIO bus would not be
probed properly.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
net: stmmac: Add support for optional reset signal

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
net: stmmac: Allocate and pass soc/board specific data to callbacks

The current .init and .exit callbacks requires access to driver
private data structures. This is not a good seperation and abstraction.

Instead, we add a new .setup callback for allocating private data, and
pass the returned pointer to the other callbacks.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
blackfin: Update stmmac callback signatures

stmmac callbacks have been extended for better seperation.
Update them to avoid breakage.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
net: stmmac: Honor DT parameter to force DMA store and forward mode

"snps,force_sf_dma_mode" is documented in stmmac device tree bindings,
but is never handled by the driver.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
net: stmmac: Use platform data tied with compatible strings

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
net: stmmac: sunxi platform extensions for GMAC in Allwinner A20 SoC's

The Allwinner A20 has an ethernet controller that seems to be
an early version of Synopsys DesignWare MAC 10/100/1000 Universal,
which is supported by the stmmac driver.

Allwinner's GMAC requires setting additional registers in the SoC's
clock control unit.

The exact version of the DWMAC IP that Allwinner uses is unknown,
thus the exact feature set is unknown.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
clk: sunxi: Add Allwinner A20/A31 GMAC clock unit

The Allwinner A20/A31 clock module controls the transmit clock source
and interface type of the GMAC ethernet controller. Model this as
a single clock for GMAC drivers to use.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: Add GMAC controller node to sun7i DTSI

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: Add pin muxing options for the GMAC

The A20 has EMAC and GMAC muxed on the same pins.
Add pin sets with gmac function for MII and RGMII mode to the DTSI.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: cubietruck: Enable the GMAC

The CubieTruck uses the GMAC with an RGMII phy.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: cubieboard2: Enable GMAC instead of EMAC

GMAC has better performance and fewer hardware issues.
Use the GMAC in MII mode for ethernet instead of the EMAC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: olinuxino-micro: Enable GMAC instead of EMAC

GMAC has better performance and fewer hardware issues.
Use the GMAC in MII mode for ethernet instead of the EMAC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: Add ethernet alias for GMAC

U-Boot will insert MAC address into the device tree image.
It looks up ethernet[0-5] aliases to find the ethernet nodes.
Alias GMAC as ethernet0, as it is the only ethernet controller used.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>