ARM: OMAP2+: omap2plus_defconfig: Enable crypto options

Many OMAP2+ devices have some combination of AES,DES and SHA crypto hardware
accelerators. We enable them by default in the defconfig.

Signed-off-by: Joel Fernandes <joelf@ti.com>
[Applied base patches]
dma: edma: Split out PaRAM set calculations into its own function

PaRAM set calculation is abstracted into its own function to
enable better reuse for other DMA cases such as cyclic. We adapt
the Slave SG case to use the new function.

This provides a much cleaner abstraction to the internals of the
PaRAM set. However, any PaRAM attributes that are not common to
all DMA types must be set separately such as setting of interrupts.
This function takes care of the most-common attributes.

Also added comments clarifying A-sync case calculations.

Signed-off-by: Joel Fernandes <joelf@ti.com>
dma: edma: Add support for Cyclic DMA

Using the PaRAM configuration function that we split for reuse by the
different DMA types, we implement Cyclic DMA support.
For the cyclic case, we pass different configuration parameters to this
function, and handle all the Cyclic-specific functionality separately.

Callbacks to the DMA users are handled using vchan_cyclic_callback in
the virt-dma layer. Linking is handled the same way as the slave SG case
except for the last slot where we link it back to the first one in a
cyclic fashion.

For continuity, we check for cases where no.of periods is great than the
MAX number of slots the driver can allocate for a particular descriptor
and error out on such cases.

Signed-off-by: Joel Fernandes <joelf@ti.com>
dma: edma: Increase maximum SG limit to 20

davinci-pcm uses 16 as the no.of periods. With this, in EDMA we have to
allocate atleast 17 slots: 1 slot for channel, and 16 slots the periods.

Due to this, the MAX_NR_SG limitation causes problems, set it to 20 to make
cyclic DMA work when davinci-pcm is converted to use DMA Engine.

Signed-off-by: Joel Fernandes <joelf@ti.com>
dma: edma: Add DMA memcpy support

Signed-off-by: Joel Fernandes <joelf@ti.com>
[Applied dma patches]
ARM: OMAP4: hwmod: Add hwmod data for AES IP

Crypto modules AES0/1 belong to:
    PD_L4_PER power domain
    CD_L4_SEC clock domain
    On the L3, the AES modules are mapped to
    L3_CLK2: Peripherals and multimedia sub clock domain

We add hwmod data for the same.

Signed-off-by: Joel Fernandes <joelf@ti.com>
ARM: OMAP4: hwmod: add hwmod data for DES IP

OMAP4 has a DES IP for DES and 3DES encryption, Add hwmod data for the same.

Signed-off-by: Joel Fernandes <joelf@ti.com>
ARM: DRA7xx: hwmod: Add hwmod data for DES IP

dra7xx SoC has a DES module. Add the required data to hwmod.

Signed-off-by: Joel Fernandes <joelf@ti.com>
ARM: DRA7xx: hwmod: Add hwmod data for AES IP

DRA7xx SoC has same AES IP has OMAP4. Add hwmod data for PM functions
for the same.

Signed-off-by: Joel Fernandes <joelf@ti.com>
[Applied hwmod patches]
crypto: omap-des: Add omap-des driver for OMAP4/AM43xx

Add omap-des driver with platform data for OMAP4. Support added for DES
ECB and CBC modes.

Where possible, code is reused from omap-aes driver with changes made for
adjusting key size, block size, removing non-existent encryption modes
and adding support for OMAP4 platform data and offsets.

Tests have been conducted with the CRYPTO test manager, and functionality
is verified at different page length alignments.

Signed-off-by: Joel Fernandes <joelf@ti.com>
crypto: omap-des: Add config and build options

Add config and build options for the newly added omap-des driver.

Signed-off-by: Joel Fernandes <joelf@ti.com>
crypto: omap-des: Add triple DES (des3_ede) support to driver

OMAP DES module supports 3DES operation where 3 64-bit keys are used to
perform a DES encrypt-decrypt-encrypt (ede) operation on a buffer.

v2 changes:
Address review comments from Rajendra at: https://lkml.org/lkml/2013/8/30/116

Signed-off-by: Joel Fernandes <joelf@ti.com>
crypto: omap-aes: Remove FLAGS_FAST flag

FLAGS_FAST is no longer used, remove it.

Signed-off-by: Joel Fernandes <joelf@ti.com>
[Applied crypto patches]
ARM: kernel: irq: Simplify allocation of stack frame

On receiving IRQ exception in SVC mode, all the SVC mode registers are saved
onto the stack very early on.

The stack frame allocation code for IRQ entry during SVC mode (svc_entry) is
hard to read as 4-less is allocated initially only to be allocated later
implicity using the mov r3, [sp, #-4]! instruction. We make code easier to read
by allocating the 4 bytes on the stack frame in the beginning itself and remove
all instances where 4 bytes is adjusted.

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Nicolas Pitre <nico@linaro.org>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
[Applied arm-kernel patches]
ARM: dts: OMAP4: Add node for AES

OMAP4 has an AES module that uses the omap-aes crypto driver.
Add DT entries for the same.

Signed-off-by: Joel Fernandes <joelf@ti.com>