don't overwrite RSI on entry, RAX instead. would be better if we did't have to clobber any registers.
putting constants in a slightly saner place
add periodic timer to timing interface with an lapic implementation... which currently ignores the period specified
initial activations test, timer is only on BSP, but but control transfer works: Interrupt -> ISR -> dispatcher -> userspace thread scheduler -> executing thread.  timer interrupts during systemcalls will fall catashrophically
ignore all the things