dynamic filesync: add some cache optimizations
and clean up file format and typos

bump version to 1.1

Signed-off-by: Paul Reioux <reioux@gmail.com>
fs/dyn_fsync: check dyn fsync control's active prior to performing fsync ops

Signed-off-by: Andrew Bartholomew <andrewb03@gmail.com>
dynamic fsync: favor true case since most will be using this feature
dynamic fsync: don't disable fdatasync()

Signed-off-by: Paul Reioux <reioux@gmail.com>
Touch to wake: Different infinite mode handling (AndiP71)

- if touch wake delay is set to 0 (infinite mode), the power button will
  now also disable touch to wake (like it is for normal delays)
Touch Wake : bump to v1.1  (Yank555.lu)

- fix git merge derp in drivers/sensor/cm36651.c
- fix random misbehaving related to powerkey / proxy
- slight code cleanup
- optimized using likely / unlikely
- added precise debugging prints (enabled by #define)
Touch Wake : bump to v1.1 (Yank555.lu)

- fix git merge derp in drivers/sensor/cm36651.c
- fix random misbehaving related to powerkey / proxy
- slight code cleanup
- optimized using likely / unlikely
- added precise debugging prints & sysfs file (enabled by #define)

NB: This second commit fixes a wrong understand due to the merge derp.
Revert "Forced Fast Charge v1.2b"

This reverts commit 7157553560df130069a68b4f060535b775296557.
Touch Wake : bump to v1.1a (Yank555.lu)

- fixed touch wake disbaled as soon as proxy sensor was enabled, no matter if proximity was detected or not (my derp, introduced in 1.1)
- fixed proximity state change detection (is in cm36651.c, not ssp_input.c, which is not compiled for i9300)
- removed "off hook" detection, it was relying on a constant (PSTN_ON_HOOK, defined in telephony.h), so made no sense to keep it
mali: GPU clock and voltage control including auto-applied full freq. range voltage table (Yank555.lu)

- Fixed a derp in mali_platform_dvfs.c that impeeded voltage being initialized for highest frequency (Yank555.lu)

    mali_dvfs_table_update gets called before the initialization of the ASV level, which
    at that stage is reported as ASV 0 when it is 6 once boot is completed on my device

- Included proper voltage table for all 20 freq. levels with automatic update when changing any GPU freq. (Yank555.lu)

SysFS interface :

 * clock control (old legacy interface) :
 *
 *    - set frequencies (5 steps) :
 *
 *          echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_clock_control/gpu_control
 *
 *      available frequency steps :
 *
 *           54,  108,  160,  200*, 266,  275, 300,
 *          333,  350,  400*, 440,  500*, 533, 600*,
 *          640*, 666*, 700*, 733*, 750*, 800
 *          (* newly introduced steps)
 *
 *      NB: Any change will trigger a reset of all voltages !
 *
 *    - set frequency-step thresholds (up & down) :
 *
 *          echo "step0_up% step1_down% step1_up% step2_down% step2_up% step3_down% step3_up% step4_down%" > /sys/class/misc/gpu_clock_control/gpu_control
 *
 *      available thresholds :
 *
 *          0% - 100%
 *
 *    - set staycount for each step (default = 0) :
 *
 *          echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_clock_control/gpu_staycount
 *
 *      available staycount values :
 *
 *          0 - 255
 *
 * clock control (new interface) :
 *
 *    - set frequencies (5 steps) :
 *
 *          echo "freq" > /sys/class/misc/gpu_clock_control/gpu_freq_0...4
 *
 *      available frequency steps :
 *
 *           54,  108,  160,  200*, 266,  275, 300,
 *          333,  350,  400*, 440,  500*, 533, 600*,
 *          640*, 666*, 700*, 733*, 750*, 800
 *          (* newly introduced steps)
 *
 *      NB: Only actually existing steps will be accepted (old legacy accepts anything between min and max !!)
 *          Any change will trigger a reset of all voltages !
 *
 *    - set frequency-step thresholds (up & down) :
 *
 *          echo "threshold" > /sys/class/misc/gpu_clock_control/gpu_upthreshold_0...3
 *
 *          echo "threshold" > /sys/class/misc/gpu_clock_control/gpu_downthreshold_1...4
 *
 *      available thresholds :
 *
 *          0 - 100
 *
 *    - set staycount for each step (default = 0) :
 *
 *          echo "staycount" > /sys/class/misc/gpu_clock_control/gpu_staycount_0...4
 *
 *      available staycount values :
 *
 *          0 - 255
 *
 *    - list all available frequencies (read-only) :
 *
 *          cat /sys/class/misc/gpu_clock_control/available_frequencies
 *
 * voltage control (old legacy interface) :
 *
 *    - set frequency-step voltage (5 steps) :
 *
 *          echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_voltage_control/gpu_control
 *
 *      available voltages :
 *
 *          600000 - 1400000
 *
 * voltage control (new interface) :
 *
 *    - set frequency-step voltage (5 steps) :
 *
 *          echo "voltage" > /sys/class/misc/gpu_voltage_control/gpu_voltage_0...4
 *
 *      available voltages :
 *
 *          600000 - 1400000
 *
 *    - display ASV level (read-only) :
 *
 *          cat /sys/class/misc/gpu_voltage_control/asv_level
 *
 *    - recalculate mali_dvfs_table (write-only) :
 *
 *          echo 1 > /sys/class/misc/gpu_voltage_control/mali_dvfs_table_update
mali: GPU clock and voltage control including auto-applied full freq. range voltage table (Yank555.lu)

- (new) voltage interface switchabled readonly/readwrite using a #define (mali_dvfs_table_update will be removed in readonly mode)

- Fixed a derp in mali_platform_dvfs.c that impeeded voltage being initialized for highest frequency (Yank555.lu)

mali_dvfs_table_update gets called before the initialization of the ASV level, which
at that stage is reported as ASV 0 when it is 6 once boot is completed on my device

- Included proper voltage table for all 20 freq. levels with automatic update when changing any GPU freq. (Yank555.lu)

SysFS interface :

* clock control (old legacy interface) :
*
* - set frequencies (5 steps) :
*
* echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_clock_control/gpu_control
*
* available frequency steps :
*
* 54, 108, 160, 200*, 266, 275, 300,
* 333, 350, 400*, 440, 500*, 533, 600*,
* 640*, 666*, 700*, 733*, 750*, 800
* (* newly introduced steps)
*
* NB: Any change will trigger a reset of all voltages !
*
* - set frequency-step thresholds (up & down) :
*
* echo "step0_up% step1_down% step1_up% step2_down% step2_up% step3_down% step3_up% step4_down%" > /sys/class/misc/gpu_clock_control/gpu_control
*
* available thresholds :
*
* 0% - 100%
*
* - set staycount for each step (default = 0) :
*
* echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_clock_control/gpu_staycount
*
* available staycount values :
*
* 0 - 255
*
* clock control (new interface) :
*
* - set frequencies (5 steps) :
*
* echo "freq" > /sys/class/misc/gpu_clock_control/gpu_freq_0...4
*
* available frequency steps :
*
* 54, 108, 160, 200*, 266, 275, 300,
* 333, 350, 400*, 440, 500*, 533, 600*,
* 640*, 666*, 700*, 733*, 750*, 800
* (* newly introduced steps)
*
* NB: Only actually existing steps will be accepted (old legacy accepts anything between min and max !!)
* Any change will trigger a reset of all voltages !
*
* - set frequency-step thresholds (up & down) :
*
* echo "threshold" > /sys/class/misc/gpu_clock_control/gpu_upthreshold_0...3
*
* echo "threshold" > /sys/class/misc/gpu_clock_control/gpu_downthreshold_1...4
*
* available thresholds :
*
* 0 - 100
*
* - set staycount for each step (default = 0) :
*
* echo "staycount" > /sys/class/misc/gpu_clock_control/gpu_staycount_0...4
*
* available staycount values :
*
* 0 - 255
*
* - list all available frequencies (read-only) :
*
* cat /sys/class/misc/gpu_clock_control/available_frequencies
*
* voltage control (old legacy interface) :
*
* - set frequency-step voltage (5 steps) :
*
* echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_voltage_control/gpu_control
*
* available voltages :
*
* 600000 - 1400000
*
* voltage control (new interface) :
*
* - set frequency-step voltage (5 steps) :
*
* echo "voltage" > /sys/class/misc/gpu_voltage_control/gpu_voltage_0...4
*
* available voltages :
*
* 600000 - 1400000
*
* - display ASV level (read-only) :
*
* cat /sys/class/misc/gpu_voltage_control/asv_level
*
* - recalculate mali_dvfs_table (write-only) :
*
* echo 1 > /sys/class/misc/gpu_voltage_control/mali_dvfs_table_update
mali: GPU clock and voltage control including auto-applied full freq. range voltage table (Yank555.lu)

- (new) voltage interface switchabled readonly/readwrite in menuconfig

- Fixed a derp in mali_platform_dvfs.c that impeeded voltage being initialized for highest frequency (Yank555.lu)

mali_dvfs_table_update gets called before the initialization of the ASV level, which
at that stage is reported as ASV 0 when it is 6 once boot is completed on my device

- Included proper voltage table for all 20 freq. levels with automatic update when changing any GPU freq. (Yank555.lu)

SysFS interface :

* clock control (old legacy interface) :
*
* - set frequencies (5 steps) :
*
* echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_clock_control/gpu_control
*
* available frequency steps :
*
* 54, 108, 160, 200*, 266, 275, 300,
* 333, 350, 400*, 440, 500*, 533, 600*,
* 640*, 666*, 700*, 733*, 750*, 800
* (* newly introduced steps)
*
* NB: Any change will trigger a reset of all voltages !
*
* - set frequency-step thresholds (up & down) :
*
* echo "step0_up% step1_down% step1_up% step2_down% step2_up% step3_down% step3_up% step4_down%" > /sys/class/misc/gpu_clock_control/gpu_control
*
* available thresholds :
*
* 0% - 100%
*
* - set staycount for each step (default = 0) :
*
* echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_clock_control/gpu_staycount
*
* available staycount values :
*
* 0 - 255
*
* clock control (new interface) :
*
* - set frequencies (5 steps) :
*
* echo "freq" > /sys/class/misc/gpu_clock_control/gpu_freq_0...4
*
* available frequency steps :
*
* 54, 108, 160, 200*, 266, 275, 300,
* 333, 350, 400*, 440, 500*, 533, 600*,
* 640*, 666*, 700*, 733*, 750*, 800
* (* newly introduced steps)
*
* NB: Only actually existing steps will be accepted (old legacy accepts anything between min and max !!)
* Any change will trigger a reset of all voltages !
*
* - set frequency-step thresholds (up & down) :
*
* echo "threshold" > /sys/class/misc/gpu_clock_control/gpu_upthreshold_0...3
*
* echo "threshold" > /sys/class/misc/gpu_clock_control/gpu_downthreshold_1...4
*
* available thresholds :
*
* 0 - 100
*
* - set staycount for each step (default = 0) :
*
* echo "staycount" > /sys/class/misc/gpu_clock_control/gpu_staycount_0...4
*
* available staycount values :
*
* 0 - 255
*
* - list all available frequencies (read-only) :
*
* cat /sys/class/misc/gpu_clock_control/available_frequencies
*
* voltage control (old legacy interface) :
*
* - set frequency-step voltage (5 steps) :
*
* echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_voltage_control/gpu_control
*
* available voltages :
*
* 600000 - 1400000
*
* voltage control (new interface) :
*
* - set frequency-step voltage (5 steps) :
*
* echo "voltage" > /sys/class/misc/gpu_voltage_control/gpu_voltage_0...4
*
* available voltages :
*
* 600000 - 1400000
*
* - display ASV level (read-only) :
*
* cat /sys/class/misc/gpu_voltage_control/asv_level
*
* - recalculate mali_dvfs_table (write-only) :
*
* echo 1 > /sys/class/misc/gpu_voltage_control/mali_dvfs_table_update
mali: GPU clock and voltage control including auto-applied full freq. range voltage table (Yank555.lu)

- (new) added global voltage delta to be applied on all steps whenever voltages are reset

- voltage interface switchabled readonly/readwrite in menuconfig

- Fixed a derp in mali_platform_dvfs.c that impeeded voltage being initialized for highest frequency (Yank555.lu)

    mali_dvfs_table_update gets called before the initialization of the ASV level, which
    at that stage is reported as ASV 0 when it is 6 once boot is completed on my device

- Included proper voltage table for all 20 freq. levels with automatic update when changing any GPU freq. (Yank555.lu)

SysFS interface :

* clock control (old legacy interface) :
*
*    - set frequencies (5 steps) :
*
*          echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_clock_control/gpu_control
*
*       available frequency steps :
*
*           54 , 108 , 160 , 200*, 266 , 275, 300 ,
*          333 , 350 , 400*, 440 , 500*, 533, 600*,
*          640*, 666*, 700*, 733*, 750*, 800
*          (* newly introduced steps)
*
*       NB: Any change will trigger a reset of all voltages !
*
*    - set frequency-step thresholds (up & down) :
*
*          echo "step0_up% step1_down% step1_up% step2_down% step2_up% step3_down% step3_up% step4_down%" > /sys/class/misc/gpu_clock_control/gpu_control
*
*       available thresholds :
*
*          0% - 100%
*
*    - set staycount for each step (default = 0) :
*
*          echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_clock_control/gpu_staycount
*
*       available staycount values :
*
*          0 - 255
*
* clock control (new interface) :
*
*    - set frequencies (5 steps) :
*
*          echo "freq" > /sys/class/misc/gpu_clock_control/gpu_freq_0...4
*
*       available frequency steps :
*
*           54 , 108 , 160 , 200*, 266 , 275, 300 ,
*          333 , 350 , 400*, 440 , 500*, 533, 600*,
*          640*, 666*, 700*, 733*, 750*, 800
*          (* newly introduced steps)
*
*       NB: Only actually existing steps will be accepted (old legacy accepts anything between min and max !!)
*           Any change will trigger a reset of all voltages !
*
*    - set frequency-step thresholds (up & down) :
*
*          echo "threshold" > /sys/class/misc/gpu_clock_control/gpu_upthreshold_0...3
*
*          echo "threshold" > /sys/class/misc/gpu_clock_control/gpu_downthreshold_1...4
*
*       available thresholds :
*
*          0 - 100
*
*    - set staycount for each step (default = 0) :
*
*          echo "staycount" > /sys/class/misc/gpu_clock_control/gpu_staycount_0...4
*
*       available staycount values :
*
*          0 - 255
*
*    - list all available frequencies (read-only) :
*
*          cat /sys/class/misc/gpu_clock_control/available_frequencies
*
* voltage control (old legacy interface) :
*
*    - set frequency-step voltage (5 steps) :
*
*          echo "step0 step1 step2 step3 step4" > /sys/class/misc/gpu_voltage_control/gpu_control
*
*       available voltages :
*
*          600000 - 1400000
*
* voltage control (new interface) :
*
*    - set frequency-step voltage (5 steps) :
*
*          echo "voltage" > /sys/class/misc/gpu_voltage_control/gpu_voltage_0...4
*
*       available voltages :
*
*          600000 - 1400000
*
*    - global over-/undervolt all steps (5 steps) :
*
*          echo "voltage" > /sys/class/misc/gpu_voltage_control/gpu_voltage_detla
*
*       available delta voltages :
*
*          -250000 - +250000 (applied voltages will never drop below 600000 nor cross 1400000)
*
*    - display ASV level (read-only) :
*
*          cat /sys/class/misc/gpu_voltage_control/asv_level
*
*    - recalculate mali_dvfs_table (write-only) :
*
*          echo 1 > /sys/class/misc/gpu_voltage_control/mali_dvfs_table_update
vfp: Use hard-float and neon libraries instead of vfp ones
Compiler CFLAGS
serial/mxs-auart: fix race condition in interrupt handler

commit d970d7fe65adff5efe75b4a73c4ffc9be57089f7 upstream.

The handler needs to ack the pending events before actually handling them.
Otherwise a new event might come in after it it considered non-pending or
handled and is acked then without being handled. So this event is only
noticed when the next interrupt happens.

Without this patch an i.MX28 based machine running an rt-patched kernel
regularly hangs during boot.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
serial/mxs-auart: increase time to wait for transmitter to become idle

commit 079a036f4283e2b0e5c26080b8c5112bc0cc1831 upstream.

Without this patch the driver waits ~1 ms for the UART to become idle. At
115200n8 this time is (theoretically) enough to transfer 11.5 characters
(= 115200 bits/s / (10 Bits/char) * 1ms). As the mxs-auart has a fifo size
of 16 characters the clock is gated too early. The problem is worse for
lower baud rates.

This only happens to really shut down the transmitter in the middle of a
transfer if /dev/ttyAPPx isn't opened in userspace (e.g. by a getty) but
was at least once (because the bootloader doesn't disable the transmitter).

So increase the timeout to 20 ms which should be enough for 9600n8, too.
Moreover skip gating the clock if the timeout is elapsed.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
ath9k_htc: do some initial hardware configuration

commit dc2a87f519a4d8cb376ab54f22b6b98a943b51ce upstream.

Currently we configure harwdare and clock, only after
interface start. In this case, if we reload module or
reboot PC without configuring adapter, firmware will freeze.
There is no software way to reset adpter.

This patch add initial configuration and set it in
disabled state, to avoid this freeze. Behaviour of this patch
should be similar to: ifconfig wlan0 up; ifconfig wlan0 down.

Bug: https://github.com/qca/open-ath9k-htc-firmware/issues/1
Tested-by: Bo Shi <cnshibo@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
nl80211: fix mgmt tx status and testmode reporting for netns

commit a0ec570f4f69c4cb700d743a915096c2c8f56a99 upstream.

These two events were sent to the default network
namespace.

This caused AP mode in a non-default netns to not
work correctly. Mgmt tx status was multicasted to
a different (default) netns instead of the one the
AP was in.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
mac80211: fix duplicate retransmission detection

commit 6b0f32745dcfba01d7be33acd1b40306c7a914c6 upstream.

The duplicate retransmission detection code in mac80211
erroneously attempts to do the check for every frame,
even frames that don't have a sequence control field or
that don't use it (QoS-Null frames.)

This is problematic because it causes the code to access
data beyond the end of the SKB and depending on the data
there will drop packets erroneously.

Correct the code to not do duplicate detection for such
frames.

I found this error while testing AP powersave, it lead
to retransmitted PS-Poll frames being dropped entirely
as the data beyond the end of the SKB was always zero.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>