msm_mdp: Update header for 4 layer support

Bug: 7626586
Change-Id: I37730470dc09b7a9d6336b1603f87efd98f45e97
Signed-off-by: Iliyan Malchev <malchev@google.com>
bionic: Fix aliasing violations

This makes bionic compile with compilers enforcing
strict adherence to aliasing rules (e.g. gcc 4.6+
with -Wstrict-aliasing=2 -Werror=strict-aliasing).

Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org>
libm: Add a proper sincos() implementation

Add a proper sincos() implementation that unifies the common
calculations for sin and cos instead of running them twice.

This should cause a speedup even in code not using that
(fairly uncommon) function because gcc can optimize separate
sin() and cos() calls into sincos() calls.

Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org>
bionic:Add new header files for graphics

The header files "hwmem.h" and "b2r2_blt.h" are needed
by the ST-Ericsson graphics implementation.

Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
bionic: Add ARMv7 optimized string handling routines

Add ARMv7 - and especially Cortex-A9 - optimized string handling
routines based on the versions found in the cortex-strings library.

Change-Id: I497075bea5b82aef8989625bdec512029676fe7f
Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org>
bionic: Add workarounds for current compilers

With current compilers, we're getting "this function cannot be inlined"
errors on vsnprintf and strlcpy because the always_inline attribute is
set.

Before marking this a "fix" instead of a "workaround", we should figure
out why the functions can't be inlined.

Change-Id: Id6c5464defafb3f9044c102d32a57e70d760b05d
Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org>
Add optimized version of memcpy for Cortex A9

Adds new code to memcpy function, optimized for Cortex A9.
Adds new ARM-only loop, for operations where source and
destination are aligned.

Copyright (C) ST-Ericsson SA 2010

Modified neon implementation to fit Cortex A9 cache line size,
for those running 32 bytes L2 cache line size.
Also split the implementation in aligned and unaligned access,
for those that allows unaligned memory access with Neon.
For totally aligned operations, arm-only code is used.

Change-Id: I95ebf6164cd6486b12a7e3e98e369db21e7e18d2
Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
bionic: Make use of new memcpy, tweak settings

The new memcpy() is slightly faster than the cortex-strings version,
and fixes the Galaxy Nexus camera issue.

Change-Id: Ie65d14992a399e9bc2709a3d710d52b5b1a62e87
Signed-off-by: Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org>
Basic KSM support (2/2)

Change-Id: I8fab05063a6d48476eaa0c74094c1bb64af1801d
Use GCC's __attribute__((const)) to reduce code size

__attribute__((const)) is mainly intended for the compiler to optimize
away repeated calls to a function that the compiler knows will return
the same value repeatedly.

By adding __attribute__((const)), the compiler can choose to call the
function just once and cache the return value.  Therefore, this yields
code size reduction.

Here are the reference results by arm-eabi-size for crespo device:

[before]
   text    data     bss     dec     hex filename
 267715   10132   45948  323795   4f0d3

[after]
   text    data     bss     dec     hex filename
 267387   10132   45948  323467   4ef8b

Change-Id: I1d80465c0f88158449702d4dc6398a130eb77195
sha1: code cleanup and use modern C syntax

Apply the following changes:
- Remove out-of-date workaround (SPARC64_GCC_WORKAROUND)
- Use C99 prototype and stdint type

Change-Id: I630cf97f6824f72f4165e0fa9e5bfdad8edabe48
sha1: Use bswap* to optimize byte order

bionic libc already makes use of ARMv6+ rev/rev16 instruction for
endian conversion, and this patch rewrites some parts of SHA1
implementations with swap32 and swap64 routines, which is known to
bring performance improvements.

The reference sha1bench on Nexus S:

[before]
Rounds: 100000, size: 6250K, time: 1.183s, speed: 5.16  MB/s

Change-Id: Id04c0fa1467b3006b5a8736cbdd95855ed7c13e4
[after]
Rounds: 100000, size: 6250K, time: 1.025s, speed: 5.957 MB/sB
memcmp: prefetch optimizing for ARM Cortex-A8/A9

The original memcmp() was tweaked for ARM9, which is not optimal for ARM
Cortex-A cores.  This patch merges the prefetch optimizations from
ST-Ericsson and removes NEON slowdowns.

Reference experiement results on Nexus S (ARM Cortex-A8; 1 GHz) using
strbench program:
    http://pasky.or.cz//dev/glibc/strbench/

[before]
size, samples, TIMES[s] - user, system, total)
   4   262144         2.510000 0.000000 2.510000
   8   131072         1.570000 0.010000 1.590000
  32    32768         1.310000 0.000000 1.320000

[after]
size, samples, TIMES[s] - user, system, total)
   4   262144         2.280000 0.000000 2.290000
   8   131072         1.210000 0.000000 1.220000
  32    32768         1.040000 0.000000 1.050000

Change-Id: I961847da96d2025f7049773cd2ddaa08579e78d6
FORTIFY_SOURCE: remove memcpy overlap checks

These checks haven't been as useful as I hoped, and it's
causing a false positive finding.  Remove the overlap
compile time checks.

Change-Id: I5d45dde10ae4663d728230d41fa904adf20acaea
Verify architecture neutral syscall numbers

Also removed some dead code and fixed comment

Change-Id: I5d6a04b4af3d95e34368136cf2eeb3c9b6f99769
Signed-off-by: Chris Dearman <chris@mips.com>
Fix perf regression on Cortex A15 by optimized memcpy for Cortex A9

The new Cortex A9 optimized memcpy included an arm-only version that is
slower than the current neon Cortex A15. This arm-only version was used
when the dst was aligned to an 8 byte boundary, otherwise, the original
neon only version was used. This change modifies the code so it always
uses the neon only version for the Cortex A15. It also fixes the use of
a define removed with the previous optimization.

Change-Id: I971527568a177218cd8b76a8bd160aaaf6ea1e42
TEST: Disable leak checking for mksh; it's way too leaky.

When each shell leaks ~240 allocations, you can't see the leaks from
the program you ran with "adb shell".

Bug: 7291287

Conflicts:

	libc/bionic/malloc_debug_common.cpp

Change-Id: Ib8780db72ba0114ebdb24768537da74bbb61f354
Add optimized version of memset for Cortex A9

Adds new code to function memset, optimized for Cortex A9.

Copyright (C) ST-Ericsson SA 2010

Added neon implementation

Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.

Change-Id: Id3c87767953439269040e15bd30a27aba709aef6
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
Revert "libm: Add a proper sincos() implementation"

this is casuing incorrect distance calculations.

This reverts commit 758630b4242db1926f867faba1f7c532abab9ba5.

Change-Id: I92802ee93851c949b704d17475b1a9e0fb3aaeb9
proper bzero implementation

Change-Id: If0a1c85494d12f5f9e4cde124d37fe386f7bba98