ARM i.MX ESDCTL: Fix default enabled esdctl v2 controller

On some i.MX SoCs the SDRAM controller has chipselect 2 enabled
by reset default. This confuses our SDRAM size detection. We
already have a fix for this in place. This patch adds the fix
for i.MX35 which needs it aswell. Also since we now detect the
SDRAM size in the SoC specific entry functions we have to apply
the fixup there, too.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>