mx35: Clean up lowlevel_init

Clean up mx35 lowlevel_init:
 - Indent with tabs.
 - Fix comments.
 - Use defined values instead of literal constants.
 - Use defined macros instead of duplicating code.
 - Use macro parameters with default values instead of #define'd configs.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
mx35: Fix eSDHC clocks

Each eSDHC instance has a dedicated clock.

gd->sdhc_clk must also be set accordingly. This is good for the case only a
single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A
future patch will fix the multi-instance use case (initialization made directly
with fsl_esdhc_initialize()).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
mxc: Fix SDHC multi-instance clock

On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).

This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
mx6qsabreauto: Change mmcroot so it works out of box

The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we
move this to the board configuration file.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
mx6qsabreauto: Pass the board revision to the kernel

The kernel from Freescale expects that the bootloader passes the board revision.

Read the board revision and pass it via get_board_rev().

Without passing the board revision the kernel does not operate properly as the
initialization of peripherals are different in revA versus revB boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
i.MX: iomux: input pad array can be const

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
i.MX: declare iomux_v3_cfg_t arrays as const

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
i.MX video: struct fb_videomode can be const

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
i.MX: ipufb: add const to fb_videomode declarations

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
i.MX6: set drive strength for parallel RGB pads

Default drive strength is disabled and won't function.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
i.MX6: add HDMI transmitter register declarations from kernel WIP.

Original source from Pengutronix HDMI driver work:

	http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=72c31cd67ac880bd90785af86f8e46f8ea7b3bb0

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
i.MX6: mx6qsabrelite: Add splash screen support

Adds support for HDMI, two LVDS panels and one RGB panel to
the SABRE-Lite board.

Displays supported:
         HDMI		- 1024 x 768 for maximum compatibility
         Hannstar-XGA   - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
         wsvga-lvds     - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
         wvga-rgb       - 800 x 480 RGB (Boundary p/n Nit6X_800x480)

Since the ipuv3_fb display driver currently supports only a single display,
this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
or the I2C touch controller of the LVDS and RGB displays in the priority
listed above.

Setting 'panel' environment variable to one of the names above will
override auto-detection.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
mx25: Clean up imx-regs.h

Clean up i.MX25 imx-regs.h:
 - Update mx31 imx-regs.h filename.
 - Test for __KERNEL_STRICT_NAMES just in case.
 - Define internal RAM size.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
mmc: at91: add multi block read/write support.

Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
ARM: at91sam9x5: enable MCI0 support for 9x5ek board.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
mmc: at91: use max timeout value. It will avoid some situation that timeout happened.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
mx5: lowlevel_init.S: Split init_clock macro

init_clock is currently shared between mx51 and mx53 and it contains lots of
ifdef's which makes it really hard to follow the code.

Split the init_clock between mx51 and mx53 to allow easier readability.

No functional changes are made.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx5: lowlevel_init.S: Fix PLL settings for mx53

Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz.

Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz
instead.

Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI
at 1080p because the IPU clock cannot reach the requested frequency.

Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its
maximum frequency.

Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little
bit to allow easier comparison with the original clock setup from FSL U-boot.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx53loco: Adapt the IPU clock

Since PLL2 now has changed, it is necessary to adapt the CONFIG_IPUV3_CLK
accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
configs: mx53loco: Remove CONFIG_HAS_ETH1

mx53loco has only one Ethernet port, so remove CONFIG_HAS_ETH1 option.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>