mogami: remove CONFIG_MMC_MSM_CARD_HW_DETECTION
msm_serial_hs: Don't configure gpios into UART Mode always

UARTDM device is used as interface to connect external devices through
GPIOs. Currently those GPIOs are configured in active mode once driver's
probe() is called and configured in suspend mode once its remove() is
called. Probe() is called once only and remove is not called until UARTDM
platform device is removed. With this current implementation, although
external device (ex. Bluetooth SoC) is not operational mode, used UARTDM
GPIOs are configured in active mode which is causing more leakage current
and more power consumption.

Hence configure those UARTDM GPIOs in active mode only when used UARTDM
device is opened and under used. Configure UARTDM GPIOs back to suspend
mode when UARTDM device is closed and under not used.

CRs-Fixed: 422217

Change-Id: I057a2da827f37687e5ea69bdca1533568be06eab
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
Signed-off-by: nobodyAtall <tsogkas@ceid.upatras.gr>
msm_serial_hs : handle uart_flush_buffer

Serial core allocates circular buffer for uart tx transfer.
Circular buffer head and tail is updated in serial core and
circular buffer tail is updated in uart driver.While uart
transfer is happening, uart client bluetooth hci_ldisc,calls
uart_flush_buffer in serial core and sets circular buffer
head and tail to zero.As uart driver does not know when
uart_flush_buffer is called in serial core by uart client,it
updates circular buffer tail for the previous ADM Tx completion.
This leads to queueing Tx command to ADM although no data is
there in circular buffer.Because of this,uart client is not
functional.

Hence adding msm_hs_flush_buffer api which notifies to uart driver
that uart_flush_buffer is called in serial core by uart client and
set tty_flush_receive flag to true.In uart interrupt handler ,do
not update circular buffer tail if uart_flush_buffer is already
called in serial core by uart client else update circular buffer
tail on ADM Tx completion.

(cherry picked from commit ce39410ad3db5b9fb446bf5da126585d58fa872a)

Change-Id: I9bce30da218f42739c175d9b3c283ae39b6b5c89
CRs-Fixed: 419054
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
Signed-off-by: nobodyAtall <tsogkas@ceid.upatras.gr>
msm_serial_hs: Add support to handle Rx BREAK condition

Currently Rx Break Error condition is not checked using UART_DM_SR
register. Hence by default null-character is being inserted on
receiving Rx Error or Rx Break condition. Application sets termios
c_iflag if it needs any notification related to any Rx Error or
Break condition. Hence add support to handle Rx Break condition and
insert null-character conditionally based on termios.c_iflag.

CRs-Fixed: 412201
Change-Id: I7f496e42757b949f597d5dbe5c1f1ca88ee53c8c
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: nobodyAtall <tsogkas@ceid.upatras.gr>

Conflicts:
	drivers/tty/serial/msm_serial_hs.c
msm_serial_hs: consider flush buffer request only when DMA is in progress

TTY Core uses flush_buffer to clear out any output data before closing
port, whereas UART application can always request to do flush output data
before starting data transfer using tty supported ioctl().
receive_tty_flush is used to make decision on completion of any DMA Tx
data transfer. Using same approach when there is no DMA Tx transfer is
happening, it is breaking next DMA Tx transfer functionality. Hence
update receive_tty_flush only when there is any DMA TX transfer active.

(cherry picked from commit 53069734628ebce341cf1ef778c91dbcbbcf67db)

Change-Id: I26f4ceece422674e1f7647e5dfadb476cec1ef92
CRs-Fixed: 438057
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: nobodyAtall <tsogkas@ceid.upatras.gr>
msm_serial_hs: Wait for discard flush completion for UART Rx channel

Completion of requested flush command with ADM driver is having more
latency then previously. Hence now it is required to wait for discard
flush complete if there is more events expected with UART driver which
would go out of sync without it. Below are 2 instances where it is must
to wait for discard flush completion requested on UART Rx channel.

1. Changing Baud Rate of UART
UART application can send baud rate change request based on its requirement
of communication with connected device on remote uart. Serial core also
does set by default baud rate when application is opening the uart port. As
Rx command is queued always with ADM driver from UART driver, for above
events it is required to flush the same after setting the baud rate. Not
waiting for completion of Rx flush would allow application to send command
on Tx or any other ioctl which would reach to connected device but response
may not be received as Rx flush completion is not received to queue next Rx
command to ADM. Hence with this there are chances that received data with
UART wil be lost when Rx flush completion is not received in-time. Hence
wait for Rx flush completion from set_termios() with timeout as 300 jiffie.
Rx flush completion time is non-deterministic as it depends on number of
commands queued to ADM driver from ADM client drivers.

2. While going for UART clock off
UART clock off has multiple state machines and before going into last
state it makes sure that there are no pending data in UART Tx and Rx FIFO.
Although there would be one Rx command queued which is flushed before
moving to last state and going ahead with UART clock off. If UART clock is
turned off before Rx flush request is being executed and ADM tried to flush
Rx command, ADM encounters data bus error on UART Rx Channel. Hence with
waiting for Rx flush completion, and then doing UART clock off on receving
the same would resolve ADM data bus error issue on UART Rx channel.

CRs-Fixed: 457769
Change-Id: I9344277224a2dc3f28140a1f42aa3feed5411b97
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: nobodyAtall <tsogkas@ceid.upatras.gr>
msm_serial_hs_lite: Don't set UART clock to zero always

Setting UART clock rate to zero is causing multiple issues
and leading to more confusion with other stability issues.
Setting UART clock rate to zero is invalid operation on
recent platforms and throws multiple error messages. Hence
add platform data set_uart_clk_zero to enable setting uart
clock rate to zero operation on required platform for
specific use case.

Also set set_uart_clk_zero for GSBI9 shared between different
processor.

CRs-Fixed: 455466
Change-Id: Iba04d4cf094885b0eae6a9c49ed06f750bcc1024
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: nobodyAtall <tsogkas@ceid.upatras.gr>
defconfigs: disable CIFS for improving battery life