ilo: avoid unnecessary emission of SO states

No need to emit 3DSTATE_SO_BUFFER and 3DSTATE_SO_DECL_LIST when SO is
disabled.  As the implicit flush done by the commands is also gone, emit an
explicit flush.
ilo: correctly set view extent in SURFACE_STATE

The view extent was set to be the same as the depth while it should be set to
the number of layers.  It makes a difference for 3D textures.

Also use this as a chance to clean up the code.
ilo: set more fields of 3DSTATE_DEPTH_BUFFER

Set lod/layer related fields of 3DSTATE_DEPTH_BUFFER.  Since we always point
to a single level/layer, those fields are always zero and this commit
effectively makes no change.

While at it, make it easier to disable manual slice offset calculation.
Haiku: Add Gallium winsys and target code

* We generate a static library for Haiku
  Gallium targets as our port system combines
  the compiled rendering code into a modular
  ar for each module (for example, our port
  system combines llvm libsoftpipe.a libllvmpipe.a
  into a single ar for the Haiku build system.
  I'd like the Gallium hgl target scons build
  system to do this some day, however how is
  beyond me at the moment. This is a first step.
llvmpipe: fix bug in early depth test / late depth write handling

Using wrong type if the format was less than 32bits.
No piglit changes as it doesn't hit that path.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
llvmpipe: (trivial) remove confusing code in stencil test

This was meant to disable some code which isn't needed when depth/stencil
isn't written. However, there's more code which wouldn't be needed in that
case so having the condition there was just odd (llvm will drop all the code
anyway).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
llvmpipe: fix issue with not writing new stencil values

We did mask checks between depth/stencil testing and depth/stencil write.
This meant that if the depth/stencil test killed off all fragments we never
actually wrote the new stencil value. This issue affected all early/late
test/write combinations.
So move the mask check after depth/stencil write (for early depth test,
could do the same for late depth test but might not be worth it at that
point so just skip it there).
This addresses https://bugs.freedesktop.org/show_bug.cgi?id=41787.
Piglit does not hit this issue because of the simple_shader optimization
in generate_fs_loop() which means we're skipping the mask checks.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
llvmpipe: fix early depth test / late depth write stencil issues

We actually did early depth/stencil test and late depth/stencil write even
when the shader could kill the fragment (alpha test or discard). Since it
matters for the new stencil value if the fragment is killed by depth/stencil
test or by the shader (in which case it will not reach the depth/stencil
test) this simply cannot work (we also would possibly skip writing the new
stencil value due to mask checks but this is a secondary issue).
So use late depth test / late depth write instead in this case.
(No piglit changes as it doesn't seem to hit such bogus early depth test
/ late depth write path.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
llvmpipe: disable simple_shader optimization

This optimization disabled mask checks if the shader is simple enough.
While this should work correctly, the problem is that it can hide real issues
because shaders in practice are usually complex enough (8 instructions or 1
texture is already enough) so this doesn't get used, whereas dumbed-down
tests which should hit all the same code paths suddenly do something quite
different. This was the reason that bug 41787 could not be easily tracked as
stencil test not working correctly (piglit would in fact have failed some
tests without that optimization).
So disable it for now, it's unclear if it's much of a win in any case.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
softpipe: disambiguate TILE_SIZE / TEX_TILE_SIZE

These can be different (just like NUM_TEX_TILE_ENTRIES / NUM_ENTRIES),
though currently they aren't.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
softpipe: change TEX_TILE_SIZE and NUM_TEX_TILE_ENTRIES

Initially we had NUM_TEX_TILE_ENTRIES of 50, however this was using too much
memory (mostly because the tile cache is operating on fixed max current
sampler views which could be fixed but that's another topic). So it was
decreased to 4. However this is a ridiculously low number which can't
actually really work (the number of tiles needed for as little as
a single quad with linear_mipmap_linear is 2 to 8 for a 2d texture, and
4 to 16 for a 3d texture), as it just about guarantees there will be
cache thrashing sometimes (just about always for 3d textures in fact, since
while there are 4 entries the cache is direct mapped).
So increase that number to 16 (which is still on the low side for direct
mapped cache though I guess using something like 4-way associativity would
be more effective than increasing this further) which has at least some good
chance to avoid thrashing. Since we don't want to increase memory requirements
however in turn decrease the tile size accordingly from 64 to 32 (as a bonus
point this also decreases the cost of texture thrashing which might still
happen sometimes).
I've seen performance improvement in the order of factor ~200 (specifically,
drawing the first frame from the replay from bug 41787 needs "only" ~10s
instead of ~30min, meaning I can actually compare the output with other
drivers...) with this.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
i965: Shut up more compiler warnings from vector insert/extract changes.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
intel: Count fragments in our blitter-based glBitmap() path.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59440
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
radeon: Initialize variables in radeon_llvm_context_init.

'type' was not fully initialized when calling lp_build_context_init.

Fixes "Uninitialized scalar variable" defect reported by Coverity.

NOTE: This is a candidate for the stable branches.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
i965: Enable guardband clipping on Gen4/5.

Enables guardband clipping when the viewport covers the entire render
target.

No piglit regressions on Ironlake.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>