fix dx5 insn format constant decoding

dx5 format ucst field definition was using wrong bit field definition
cleanup: tighten dstk decoding (stw & ldw)

dstk instruction should alaways have the s bit set to 1 (as per
SPRUFE8B.pdf p. 729).

Ti disassembler doesn't care though, might loosen this rule
someday.
fix dx5 display missing crosspath indication

dx5 instrucions should display that the crosspath is used when the
dst register is from the A side (as src is implicitly b15).
 - add a new flag to explicit that source is from B-side
 - modify dx5 opcode table
 - handle the case in crosspath display routine
testsuite: add test-cases for d-unit & l-unit insn