Added basic microcontroller description - command list is incomplete

Signed-off-by: keritaf <keritaf@gmail.com>
Pre-fix README

Signed-off-by: keritaf <keritaf@gmail.com>
Add initial tables on commands

Signed-off-by: keritaf <keritaf@gmail.com>
Add register file and change RAM timing

Signed-off-by: keritaf <keritaf@gmail.com>
Adding system bus arbiter

- Decentralized ring arbiter
- Bus accessor needs testing

Signed-off-by: keritaf <keritaf@gmail.com>
Change RAM MSYN/SSYN from inverse to normal levels

Signed-off-by: keritaf <keritaf@gmail.com>
Merge branch 'dev-description' into dev
Adding stack - testing needed

Signed-off-by: keritaf <keritaf@gmail.com>
Fixing stack

- Test added

Signed-off-by: keritaf <keritaf@gmail.com>
Adding instruction cache loader

Signed-off-by: keritaf <keritaf@gmail.com>
Fix instruction cache loader

Signed-off-by: keritaf <keritaf@gmail.com>
Start working on CPU execution stage

- Implement SRL, AND, SUB operations
- Operation executor is incomplete
- Execution stage testing needed, but operation executor needs to be completed

Signed-off-by: keritaf <keritaf@gmail.com>
CPU execution stage complete

Signed-off-by: keritaf <keritaf@gmail.com>
Merge branch 'dev'