msm: spm: add intermediate LPM mode for L2 PC

Currently when the core decide to enter into "PC + L2 PC"
LPM mode it informs to RPM and there is a chance of
system can enter into either XO or VDDmin. But this LPM
mode take longer time to enter and exit. Because of this
limitation some of the usecases where there is a less
latency APPS proc stays at lower LPM level (i.e GDFS) and
causing more power consumption. To address this issue adding
an intermediate LPM mode where L2 goes to PC but not inform
to RPM.

CRs-fixed: 552743
Change-Id: I321ff260d5baf8ac44917d67e9c9dfd260c8d5ca
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
msm: idle: Use ARM suspend/resume APIs to restore during warmboot

ARM generic cpu_suspend/resume APIs restore the necessary CP15 registers
to a known state when resuming from a reset state. Use of generic
suspend/resume APIs allows the msm warmboot code to not care about
restoring core registers used by ARM kernel. Also, the PM subsystem no
longer needs to allocate page table or uncached memory to save CPU
registers.

While at it convert most of the assembler code into respective C
function except for warmboot code that executes with MMU turned off.
Also, the idle subsystem no longer needs to manage a  page table or
uncached memory to save CPU registers.

Change-Id: I78a75d0a3c703390eec476199c7ca2786360e12a
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Karthik Parsha <kparsha@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/idle-v7.S
	arch/arm/mach-msm/idle.h
	arch/arm/mach-msm/pm-8x60.c
	arch/arm/mach-msm/pm.h
msm: pm: Set affinity of PM irqs to next scheduled CPU

Modify the affinity of the interrupts associated with PM driver to the cpu
that will wakeup for the next expiring timer.

Change-Id: I6a1b25538a6d12bada3345a17b3ed4ff181ac089
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/lpm_levels.c
lpm_levels: Do not consider latency during suspend

Currently, cpu mode selection does not consider pm_qos latency
values during suspend, allows cores to be power collapsed. But
the system mode selection considers pm_qos latency which causes
to not choose any deep sleep mode.

Change-Id: Ia9db8692e6eb081b29bb4d75a7c0816fec5695bc
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/lpm_levels.c