msm: msm_fb: remove mmio access through mmap

Disable access to mm io and add
appropriate range checks to ensure valid accesses
through framebuffer mmap. This prevents illegal
access into memory.

CRs-Fixed: 474706
Change-Id: If25166f2732433ef967e99c716440030b567aae9
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
msm_serial_hs: Fix Tx path issues during uart shutdown

UART queues tx transfer request to ADM and upon getting completion
callback from ADM, schedules tx tasklet in which it enables the
Tx Ready Interrupt and waits for it. On Tx ready interrupt tx
dma_in_flight is set to zero indicating no more tx data is pending.

This would cause corner case where if uart shutdown function checks
dma_in_flight flag between dmov callback and Tx Ready interrupt,
then this may cause uart shutdown function queuing dmov flush for
the completed Tx command and with this dmov flush callback never
be called. To fix this issue, move the dma_in_flight flag reset from
Tx Ready interrupt to dmov callback.

To avoid issues if any uart clients submitting any Tx requests after
uart shutdown, add is_shutdown flag and check before tx command
submission.

CRs-Fixed: 476745
Change-Id: Ibeddbe24e9f4047ecc4871555ddf35fecdfde8d5
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
msm_serial_hs: Fix UART Rx dmov command stall issues

Resetting Rx and Tx HW state machine while Rx dmov command queued
with ADM, caused dmov stall issues. Hence moving the Rx and Tx reset
to after dmov_flush. In order to do this, change the Rx path to not
enqueue dmov request as a part of dmov flush when flush is
FLUSH_IGNORE.

Removing the unnecessary UART Rx and Tx HW Reset in
msm_hs_set_bps_locked().

Require to add few clock cycles after Rx and Tx HW reset, hence
adding 10us delay as safe side. In addition to this, combining
both Rx and Tx reset in single register write.

CRs-Fixed: 481244
Change-Id: I5f181f416b8e66af689c77c4abd48131dedd32d1
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
msm_serial_hs: Fix synchronization between ADM and UART Cores

With current UART Core programming sequence, it is seen that ADM
and UART Core are going out of sync in few usecases with regression.
It is fixed by using Force RxStale feature of UART Core from
set_termios() and sending discard flush to ADM which would terminate
currently queued UART RX CMD to ADM. Add termios_in_progress check
to make decision about what kind flush to send on receiving RxStale
interrupt. It makes set_termios() more reboust and also keeps ADM
and UART Core in-sync.

Add dma_in_flight to keep check of UART Rx CMD status and BUG_ON if
UART driver is trying to queue one more UART RX CMD to ADM as UART
driver re-uses same UART RX CMD.

This change also adds check of currently set uartclk rate and next
required uartclk rate for new baud rate. If both are same it would
not call clk_set_rate() to set same uartclk rate again.

UART baud rate change request (i.e. executing set_termios()) can come
asynchronously and time to program ADM hardware with queued CMD by ADM
driver is non-deterministic. It is required by UART driver to confirm
that queued RX CMD is programmed with ADM hardware before going with
requested baud rate change operation. Hence this change wait in
set_termios() for ADM driver to program queued RX CMD before going ahead
with baud rate. Otherwise ADM may encounter data bus error with UART RX
channel which is unrecoverable.

CRs-Fixed: 475230
CRs-Fixed: 486260
Change-Id: Iacae414eb7dabc7ef661f067526121a72fd21240
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
msm_serial_hs: Disable UART RxStale before Force RxStale in set_termios

There is possible race for handling normal RxStale event and Force
Rxstale event with UART Core, when Force RxStale is issued from
set_termios(). Hence on baud rate change request disable RxStale event
mechanism, and invoke Force RxStale. With RxStale event mechanism
disabled, Force RxStale still generates interrupt.

Fix possible race condition if before completion of previous UART RX CMD
flush, set_termios() request is received. With this case it is quite
possible that rx_tlet() queues one UART RX CMD with ADM driver and also
set_termios() queues one more UART RX CMD which would results with
queueing same UART RX CMD twice with ADM driver. With this device would
crash as the ADM driver will not be able to de-reference the second UART
RX CMD work. Hence add check in set_termios with rx.flush value as
FLUSH_DATA_READY which confirms that flush is initiated but it is not
completed and wait for rx.flush to become FLUSH_NONE which would happen
only once flush is completed and new UART RX CMD is being queued with ADM
driver.

Reduce waiting time for discard flush completion as it is already waited
for queued UART Rx CMD to be programmed with ADM hardware. Hence change
wait time out from 300 jiffies to 50 mseconds.

Add an API to get important UART core registers values which can be called
from error condition. Use the same when discard flush timeout happens with
set_termios(), when rx.dma_in_flight is not set with set_termios() and when
multiple UART RX CMD queueing condition is seen in msm_hs_start_rx_locked()
API.

CRs-Fixed: 486260
Change-Id: I9552b7710a260b731a11e665083788139a73da6a
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
msm_serial_hs: Improve UART Shutdown path

For uart port close operation, serial core calls msm_hs_stop_rx_locked()
which sends discard flush request to ADM driver after changing rx.flush
state machine from FLUSH_NONE to FLUSH_STOP value. Next serial core
calls msm_hs_shutdown()and it waits for discard flush completion with
rx.flush state machine to be set as FLUSH_SHUTDOWN to complete uart
port close operation. With this approach, transfer termination is not
known by UART Core which may still allow UART core to make CRCI request
with ADM Core if new data is being received from remote uart. Hence
invoke Force RxStale from msm_hs_stop_rx_locked() which informs UART
core to terminate current Rx transfer and do not make any new CRCI
request with ADM core for any new incoming data. On receiving RxStale
interrupt, it sends discard flush request to ADM driver to terminate
transfer with ADM hardware.

This new programming sequence is required to get both UART and ADM
hardwares in-sync for termination of transfer.

CRs-Fixed: 475230
Change-Id: Id9a97145c3613e10b078999c558e169bd0560d42
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
msm_serial_hs: Fixing issue during UART shutdown

During UART port close in msm_hs_shutdown(), flag is_shutdown is
set as true and then UART interrupt is disabled and UART irq line
is freed. This is causing corner case in which even if uart shutdown
is in progress, UART interrupt can come as the UART interrupt is not
disabled and UART irq line not freed at this point. As flag
is_shutdown is set as true in msm_hs_shutdown() and then if UART
interrupt comes, it is hitting BUG_ON in UART Interrupt handler
msm_hs_isr(). To fix this issue, disable the UART irq and free
the UART irq line at the beginning of the msm_hs_shutdown() and
then set the flag is_shutdown.

In msm_hs_shutdown, disabling UART Interrupt and setting flag
is_shutdown is done with uart spinlock acquired. There is a
possibility that on other core, msm_hs_isr() might need to wait
for the same uart spinlock and later when msm_hs_isr() is executed
BUG_ON is hit. As by this time all UART Interrupt is disabled,
hence removing the BUG_ON and instead keep prints to notify the
same.

CRs-Fixed: 487945
Change-Id: Ia7d57dca7c0182395298325dcf8f9bc4b65b9926
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
Merge "msm_serial_hs: Fix Tx path issues during uart shutdown"
Merge "msm_serial_hs: Fix UART Rx dmov command stall issues"
Merge "msm_serial_hs: Fix synchronization between ADM and UART Cores"
Merge "msm_serial_hs: Disable UART RxStale before Force RxStale in set_termios"
Merge "msm_serial_hs: Improve UART Shutdown path"
Merge "msm_serial_hs: Fixing issue during UART shutdown"
Merge "msm: msm_fb: remove mmio access through mmap"