Pullup from HEAD:
On Cortex, speculative loads can cache lines to be populated after then they've
been invalidated for a DMA read.  So after the DMA read we have to reinvalidate
them again.  We have to both invalidates since the former prevents dirty lines
overwriting just DMAed data.
Pullup from HEAD:
Cortex needs ._dmamap_sync_post for BUS_DMASYNC_POSTREAD