LoopVectorize: Don't store a reversed value in the vectorized value map

When we store values for reversed induction stores we must not store the
reversed value in the vectorized value map. Another instruction might use this
value.

This fixes 3 test cases of PR16455.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185051 91177308-0d34-0410-b5e6-96231b3b80d8
Fix spelling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185052 91177308-0d34-0410-b5e6-96231b3b80d8
Add a convenience createUniqueDirectory function.

There are a few valid situation where we care about the structure inside a
directory, but not about the directory itself. A simple example is for unit
testing directory traversal.

PathV1 had a function like this, add one to V2 and port existing users of the
created temp file and delete it hack to using it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185059 91177308-0d34-0410-b5e6-96231b3b80d8
Add CXXFLAGS back to the Link command.

This is essentially reverting one piece of 184793 to try to fix one of Apple's
buildbots.  I will check with Eric to see if this is OK or if we need to find
some other solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185060 91177308-0d34-0410-b5e6-96231b3b80d8
Update testing case to make DI nodes have the correct format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185061 91177308-0d34-0410-b5e6-96231b3b80d8
Add more owners to CODE_OWNERS.TXT (Kostya Serebryany: AddressSanitizer and ThreadSanitizer; Evgeniy Stepanov: MemorySanitizer)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185064 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Add conditional store patterns

Add pseudo conditional store instructions, so that we use:

    branch foo:
    store
foo:

instead of:

    load
    branch foo:
    move
foo:
    store

z196 has real 32-bit and 64-bit conditional stores, but we don't use
any z196 instructions yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185065 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Allow immediate moves to be rematerialized


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185068 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Allow LA and LARL to be rematerialized


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185069 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Fix some embarrassing test typos


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Don't cast away constness.

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Remove unused variable.

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Add a Subtarget feature 'v8fp' to the ARM backend.


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Use MCFillFragment for zero-initialized data.
It fixes PR16338 (ICE when compiling very large two-dimensional array).

Differential Revision: http://llvm-reviews.chandlerc.com/D1043


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LoopVectorize: Use vectorized loop invariant gep index anchored in loop

Use vectorized instruction instead of original instruction anchored in the
original loop.

Fixes PR16452 and t2075.c of PR16455.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185081 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Remove alu-split.ll test

The purpose of this test was to check boundary conditions for the size
of an ALU clause.  This test is very sensitive to changes to the
optimizer or scheduler, because it requires an exact number of ALU
instructions in order to remain valid.  It's not good to have a test
this sensitive, because it is confusing to developers who implement
optimizations and then 'break' the test.

I'm not sure if there is a good way to test these limits using lit, but
if I can come up with replacement test that isn't as sensitive I'll add
it back to the tree.

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CostModel: improve the cost model for load/store of non power-of-two types such as <3 x float>, which are popular in graphics.


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Get rid of the unused class member.

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[Support/Registry.h] Include llvm/Support/Compiler.h.

Because Registry.h is using the LLVM_DELETED_FUNCTION macro.

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Improve the compression of the tablegen DiffLists by introducing a new sort
algorithm when assigning EnumValues to the synthesized registers.

The current algorithm, LessRecord, uses the StringRef compare_numeric
function.  This function compares strings, while handling embedded numbers.
For example, the R600 backend registers are sorted as follows:

  T1
  T1_W
  T1_X
  T1_XYZW
  T1_Y
  T1_Z
  T2
  T2_W
  T2_X
  T2_XYZW
  T2_Y
  T2_Z

In this example, the 'scaling factor' is dEnum/dN = 6 because T0, T1, T2
have an EnumValue offset of 6 from one another.  However, in other parts
of the register bank, the scaling factors are different:

dEnum/dN = 5:
  KC0_128_W
  KC0_128_X
  KC0_128_XYZW
  KC0_128_Y
  KC0_128_Z
  KC0_129_W
  KC0_129_X
  KC0_129_XYZW
  KC0_129_Y
  KC0_129_Z

The diff lists do not work correctly because different kinds of registers have
different 'scaling factors'.  This new algorithm, LessRecordRegister, tries to
enforce a scaling factor of 1.  For example, the registers are now sorted as
follows:

  T1
  T2
  T3
  ...
  T0_W
  T1_W
  T2_W
  ...
  T0_X
  T1_X
  T2_X
  ...
  KC0_128_W
  KC0_129_W
  KC0_130_W
  ...

For the Mips and R600 I see a 19% and 6% reduction in size, respectively.  I
did see a few small regressions, but the differences were on the order of a
few bytes (e.g., AArch64 was 16 bytes).  I suspect there will be even
greater wins for targets with larger register files.

Patch reviewed by Jakob.
rdar://14006013


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185094 91177308-0d34-0410-b5e6-96231b3b80d8