Add Verilog/SystemVerilog filename extensions

Most Verilog files use the *.vh extension for header files.

Since the IEEE 1800-2009 SystemVerilog standard, it is common for
hardware and verification files written using the newer language
constructs to use the *.sv extension for design elements, and *.svh for
headers.
Merge pull request #368 from cjdrake/master

Add Verilog (.vh) and SystemVerilog (.sv, .svh) filename extensions