r600g: fix tgsi_op2_s with trans-only instructions

This fixes the issue when dst and src is the same reg and operation on one
channel overwrites the source for other channels, e.g.:

UMUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xxxx

In this example the result of the operation on channel x is written in
TEMP[2].x and then used as a second source operand for channels y and z
instead of original value in TEMP[2].x.

This patch stores the results in temp reg and moves them to
dst after performing operation on all channels.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70327

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
radeonsi: pass alpha_ref value to PS in the user sgpr

Currently it's hardcoded in the shader, so every change requires
compilation of the shader variant, killing the performance
in Serious Sam 3 and probably other apps.

This patch passes alpha_ref in the user sgpr and removes it from
the shader key.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
radeonsi: Allow Sinking pass to move preloaded const/res/sampl

This fixes a crash in Unigine Heaven 3.0, and probably in some
others apps.
radeon/uvd: use PIPE_BIND_LINEAR for video surfaces

This new bind flag forces linear storage, but does not have other
side effects like R600_RESOURCE_FLAG_TRANSFER.

Reviewed-by: Christian König <christian.koenig@amd.com>
radeon: use staging for mapping linear textures

Textures that likely reside in VRAM, are mapped for reading and
don't require direct mapping should be staged into GTT, to avoid bad
performance. This fixes readback performance of VDPAU surfaces.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
st/vdpau: add format conversions for GetBitsYCbCr

Add simple plain C routines for NV12<->YV12 and YUYV<->UYVY
conversions. The NV12->YV12 conversion is commonly used, for instance
by VLC.

Reviewed-by: Christian König <christian.koenig@amd.com>
mesa: Add missing switch break in invalidate_framebuffer_storage()

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70411
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
i965: Don't copy prop source mods into instructions that can't take them.
configure.ac: Don't check for cross compiling.

Dead since c845140a.
configure.ac: Don't check for awk, grep, nm.

Not used since d53901c6.
build: remove forced -fno-rtti

* As discussed on the mailing list,
  forced no-rtti breaks C++ public
  API's such as the Haiku C++ libGL.so
* -fno-rtti *can* be still set however
  instead of blindly forcing -fno-rtti,
  we can rely on the llvm-config
  --cppflags output.
  If the system llvm is built without
  rtti (default), the no-rtti flag will be
  present in llvm-config --cppflags
  (which we pick up on)
  If llvm is built with rtti
  (REQUIRES_RTTI=1), then -fno-rtti is
  removed from llvm-config --cppflags.
* We could selectively add / remove rtti
  from various components, however mixing
  rtti and non-rtti code is tricky and
  could introduce missing symbols.
* This needs impact tested.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
i965: Remove dead arguments from prog_data_compare.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965: Drop a couple of unused defines.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965: Always have the struct gl_program * in the backend visitor.

vec4 already had it, so put it in the FS, too.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965: Make a brw_stage_prog_data for storing the SURF_INDEX information.

It would be nice to be able to pack our binding table so that programs
that use 1 render target don't upload an extra BRW_MAX_DRAW_BUFFERS - 1
binding table entries.  To do that, we need the compiled program to have
information on where its surfaces go.

v2: Rename size to size_bytes to be more explicit.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965/fs: Dynamically set up the WM binding table offsets.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965/vec4: Dynamically assign the VS/GS binding table offsets.

Note that the dropped comment in brw_context.h is mostly (better written)
in brw_binding_table.c as well.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965: Move the common binding table offset code to brw_shader.cpp.

Now that both vec4 and fs are dynamically assigning offsets, a lot of the
code is the same.

v2: Avoid passing around the next offset through the class.  (Review by
    Paul)

Reviewed-by: Paul Berry <stereotype441@gmail.com>
glsl: Add new GLSL 1.50 constants.

This patch populates the following built-in GLSL 1.50 variables based
on constants stored in ctx->Const:

- gl_MaxVertexOutputComponents
- gl_MaxGeometryInputComponents
- gl_MaxGeometryOutputComponents
- gl_MaxFragmentInputComponents
- gl_MaxGeometryTextureImageUnits
- gl_MaxGeometryOutputVertices
- gl_MaxGeometryTotalOutputComponents
- gl_MaxGeometryUniformComponents
- gl_MaxGeometryVaryingComponents

On i965/gen7, fixes all Piglit tests in "spec/glsl-1.50/built-in
constants/*" except for gl_MaxCombinedTextureImageUnits and
gl_MaxGeometryUniformComponents.

Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/fs: Remove bogus field prog_data->dispatch_width.

Despite the name, this field wasn't being set to the dispatch width at
all; it was always 8.  The only place it was used was that the
constant buffer read length was aligned to it, and as far as I can
tell from the docs, there is no need to align this value to the
dispatch width; aligning it to a multiple of 8 is sufficient.  So I've
just replaced it with a hardcoded 8.

v2: In gen6_wm_state, use brw->wm.base.push_const_size for consistency
with VS and GS state upload.

Reviewed-by: Eric Anholt <eric@anholt.net>