[FIX] Xilinx: Correct ipcore version number

* Increment ipcore version number from v0_28_a to v0_29_a
[FEATURE] Port 2nd compare timer pulse feature to Xilinx

* Implement pulse feature for openMAC only mode
* Rename GUI option description for second compare timer
* Disable second compare timer feature when DirectIO ipcore mode
  is selected
[FIX] Change visibility of 2nd compare timer pulse feature on Altera

* Implement pulse feature for openMAC only mode
* Rename GUI option description for second compare timer
* Disable second compare timer feature when DirectIO ipcore mode
  is selected
Increase version number to 1.8.3

Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
Update revision.txt

Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
Increase stack version number in XDDs

Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
[FIX] Add object 0x1F9B NMT_MultiplCycleAssign_AU8 to XDDs

See commit 6ec27311e2c2c6acaeed55d3951a1472e0b211a3.

Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>