initial commit
created project in new directory
added license
edge detect diagram
rearrangement
tweaks
adapted to new elements
fibonacci state diagram
design update
smaller
even smaller
improved state machine
Add UART test code
Updated README
added missing bracket
UART demo updates
Add picture of de0 nano with embecosm UART module attached
Add uart project QSF and QPF files
Stop uart makefile deleting the qsf and qpf files
A test bench for a Verilator C++ model.

  * basics_main.cpp: New file.