msm: vidc: Add error checks to avoid crash in stability tests

Added error checks so firmware calls are not made when the driver is
in bad state.

CRs-Fixed: 468807
Change-Id: I97f43767df74a5770560648999f15aa78c01b27c
Signed-off-by: Ashray Kulkarni <ashrayk@codeaurora.org>
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
Revert "msm: vidc: Fix camcorder stability issue"

This change has side-effect in scenario where SYS_ERROR is
received from firmware. If  IOMMU is detached before unloading
firmware then Venus might still be accessing it and cause
pagefaults.

This reverts commit 8fa7eb5046ac2fe8f22efd3de8bd542a3ef94506.
CRs-fixed: 476653
Change-Id: I2d37e1f2308871e7e4db9503aa00372e22e6b40d

Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
msm: vidc: Flush the workqueue before shutting down clocks

Make sure that there is no pending work in work queue before
shutting down clocks. This ensures that all the interrupts
received from firmware have been take care. Workqueue is
flushed after the interrupt line is disabled.

CRs-Fixed: 476653
CRs-Fixed: 476275
CRs-Fixed: 475527
CRs-Fixed: 473829
CRs-Fixed: 477795

Change-Id: I8210b01c1f7d3a1616b69d5f8ff5766d740b48dc
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
msm: pil-q6v5-mss: Remove Q6 proxy votes on modem boot failure

If the modem fails to boot, there will be no proxy unvote
interrupt. Remove the proxy votes for the q6 immediately
if there is such a failure.

Change-Id: Ib1c510e952094ebdad42216137a8722c68b82774
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Merge "msm: vidc: Add error checks to avoid crash in stability tests"
Merge "Revert "msm: vidc: Fix camcorder stability issue""
Merge "msm: vidc: Flush the workqueue before shutting down clocks"
Merge "msm: pil-q6v5-mss: Remove Q6 proxy votes on modem boot failure"
msm: ADSPRPC: Fix error paths to avoid double-frees and other badness

The error paths in fastrpc_device_init() and fastrpc_init() did
not properly roll back their operations. It was also possible for
fastrpc_deinit() to be called multiple times in the course of
handling a single initialization error in fastrpc_init(), such as
an SMD channel failing to open. This would result in a double-free
of the context list, leading to potential memory corruption.

CRs-Fixed: 478489
Change-Id: Ie078ce6595dc67316c25b9be9daf540552dccc2d
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Merge "msm: ADSPRPC: Fix error paths to avoid double-frees and other badness"
iommu: msm: Don't treat address 0 as an error case

Currently, the iommu page table code treats a scattergather
list with physical address 0 as an error. This may not be
correct in all cases. Physical address 0 is a valid part
of the system and may be used for valid page allocations.
Nothing else in the system checks for physical address 0
for error so don't treat it as an error.

Change-Id: I7ea5ccb3137c9adbfaef52ae5ef1f83955025a65
CRs-Fixed: 478304
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
iommu: msm: prevent partial mappings on error

If msm_iommu_map_range() fails mid way through the va
range with an error, clean up the PTEs that have already
been created so they are not leaked.

Change-Id: I23340a544760c01e472dff02344b4507568c7a80
CRs-Fixed: 478304
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
msm: mdss: Avoid potential deadlock scenarios

Ensuring that deadlocks are prevented by clearing
locks in all paths of execution.

Change-Id: I3eba988f6dd5cb860737dea6dc208628a96fa29b
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
arm/dt: msm8974: Change temperature threshold for pmic auto mode

Change the threshold to 85 degC for enabling pmic auto mode.
Change the threshold to 75 degC for disabling pmic auto mode.

Change-Id: I86a03581c0a916be9a5e7d87b68979700f8ab144
CRs-Fixed: 478422
Signed-off-by: Jennifer Liu <chihning@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
msm: pil-q6v5: Stage L2 memory power-ons to decrease inrush current

Powering on the memories all in one write may potentially cause
voltage droop on the memory power-rail. Power them on in individual
writes to avoid this. Inrush events are short enough that no explicit
delay is needed between the writes.

Change-Id: I2b75ec8764e8de0d0bc30f0ac60ae98baa0999e1
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
msm: mdss: prevent isr function pointer becoming NULL

When mdss_mdp_irq_disable_nosync is called, it is overwriting
already registered isr funtion with NULL. Remove this in order
to prevent irq flooding.

Change-Id: I20b8976e8f7303975247616be0a75ecd64a8dc8f
CRs-Fixed: 475147
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
msm_camera: temp BI gerrit, ratelimit print

https://review-android.quicinc.com/#/c/307600/

Change-Id: I96a4aee94d7ba3efa4bd4c7822a630e0f4254b4f
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
msm: krait-regulator: enable intelligent phase control

Simulation results have shown that the PMIC phase can be optimally
managed based on coefficients calculated when the cpu voltage or
load changes.
These coefficients and their aggregation do not translate to
any physical units, but indicate the power required to run the cpus.
Compare these values with phase count thresholds to decide the
number of phases to turn on. If the number of phases turn out to
be higher than the number of cpus online, restrict the phases to
the number of cpus online.
Also avoid calculating these coefficients and setting phases until
late in the init sequence, that way initializations of cpus brought
up during boot would not lower the phase count and cause a crash.

Originally this patch had a bug allowing PFM mode to be used at
422mhz Krait on certain hardware. This has been fixed in the patch

Change-Id: I94e966c81c53a076181772fcffc095a0139ab9ce
CRs-Fixed: 478517
Signed-off-by: Patrick Cain <pcain@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
msm: krait-regulator: enable phase management based on cpu status

The current code enables phase management at late init stage. This is
safe except if the acpuclock driver moves to late init stage, we might end
up enabling phase management before the acpuclock driver gets to call
voltage and mode callbacks on already onlined cpus. We risk
prematurely lowering the phase count and browning out the device.
Instead check how many cpus are actually online at probe time and enable
phase management only after voltage and mode callbacks happen for them.

Change-Id: Icfc73d8bacfbc56e94a5a1bf2c64083d1992b03c
Signed-off-by: Patrick Cain <pcain@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
msm: camera: Update CPP bandwidth request

Reduce CPP bandwidth request to 1Gbps in order to
avoid pushing bimc to 460mhz

Change-Id: Ied8426e65fc341cc6844d0de8d698061eac115dd
Signed-off-by: Kevin Chan <ktchan@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>