Fix a storage trace declaration in Processor.
Register storage trace sets as end of access chain in Memory::RegisterClient.

Memory::RegisterClient populates a storage trace set with all possible
traces through the memory system from a client back to it again. This
trace is constructed using the final buffer on the client side as "end
of chain" for all traces in the set.

This patch makes it possible to use multiple different storages in the
final callback to the client, by declaring a storage set instead of just
a storage for the end of the chain.
Separate read and write completions in DCache.

So far the memory completion used to follow this path:

1. OnMemoryCompletion:
   1a. snoop pending writes
   1b. push to m_incoming
2. DoIncoming:
   2a.  for write completions simply process the acknowledgement
   2b.  for read completions push to m_completed
3. DoCompletedReads: process read completion

This patch simplifies the process to be:

1. OnMemoryCompletion:
   1a. snoop pending writes
   1b. push read completions to m_read_responses (formerly m_completed),
       write completions to m_write_responses (formerly m_incoming)
2. DoWriteResponses: process acknowledgements
3. DoReadResponses (formerly DoCompletedReads)

This saves a cycle on every load completion.
Use a separate buffer to process read completion writebacks in DCache.
Enable conditional build of memory systems.
Factor the DDR source declaration to avoid duplicate symbols.
Fix a simulation bug in the DDR interface.
Implement reporting of user+system time and memory usage.
Use more escapes for '#' in configure.ac.
Add missing configuration for DCache.
Merge branch 'master' of github.com:svp-dev/mgsim into exceptions