top.v:
- Implemented new interface for receiving data from the USRP. Data from the USRP is 14-bit 100 MHz DDR. The DDR data clock is used in place of the local 100 MHz clock to remove the need for clock crossing and introducing cumbersome FIFO buffering / control logic. This fixes previous issues related to crossing clock domains from the USRP to the ML605 without proper FIFO buffering.
- Added push buttons (with denouncing) to control incrementing and decrementing the MMCM clock phase for receiving the USRP DDR data.