musb: add host-mode sunxi support

This patch adds preliminary host-mode SUNXI support to MUSB OTG driver.

2013-07-19:
Things do not work correctly yet; there are problems with handling of other
endpoints than hw_ep0. In other words, lsusb appears to work, but nothing else.
hw_ep[1-5] problem might be with RX/epXin failing to work.

For example with usb-storage device, as soon as storage driver tries to RX
any hw_ep other than ep0, we get 'RX proto error'. Here's RX to hw_ep2:

[ 3504.640000] musb-hdrc musb-hdrc: qh eeb758c0 periodic slot 2
[ 3504.640000] musb-hdrc musb-hdrc: qh eeb758c0 urb eea6e380 dev2 ep1in-bulk, hw_ep 2, eeb3b000/36
[ 3504.640000] musb-hdrc musb-hdrc: <-- hw2 urb eea6e380 spd3 dev2 ep1in h_addr00 h_port00 bytes 36
[ 3504.640000] musb-hdrc musb-hdrc: RXCSR2 := 0020
[ 3504.710000] musb-hdrc musb-hdrc: ** IRQ host usb0008 tx0000 rx0004
[ 3504.710000] musb-hdrc musb-hdrc: <== Power=70, DevCtl=5d, int_usb=0x8
[ 3504.710000] musb-hdrc musb-hdrc: <== hw 2 rxcsr 0004, urb actual 0 (+dma 0)
[ 3504.710000] musb-hdrc musb-hdrc: end 2 RX proto error
[ 3504.710000] musb-hdrc musb-hdrc: complete eea6e380 sg_complete+0x0/0x198 (-71), dev2 ep1in, 0/36

With sw_hcd, RX works:

[  208.020000] start_urb: ep2rx, qh(0xeeb47280, 0x1, 0x2), urb(0xee845000, 0xeebc2000, 36, 0)
[  208.020000] sw_hcd_start_urb: qh 0xeeb47280 urb ee845000 dev2 ep1in-bulk, epnum 2, eebc2000/36
[  208.020000] sw_hcd_ep_program: <-- hw2 urb ee845000 spd3 dev2 ep1in h_addr00 h_port00 bytes 36
[  208.180000] irq: sw_hcd_host0
[  208.180000] irq: (0x8, 0x0, 0x4)
[  208.180000] sw_hcd_stage0_irq: Power=70, DevCtl=5d, int_usb=0x8
[  208.180000] rx: ep(0xef09b1e8, 2, 0x203, 36), qh(0xeeb47280, 0x1, 0x2), urb(0xee845000, 0xeebc2000, 36, 0), dma(0x1, 0xc0044dbc, 0x8)
[  208.180000] RX2 count 36, buffer eebc2000 len 0/36
[  208.180000] sw_hcd_read_fifo: RX ep2 fifo f1c13008 count 36 buf eebc2000
[  208.180000] ERR: sw_hcd_host_rx, read last packet
[  208.180000] sw_hcd_giveback: qh(0xeeb47280, 0x1, 0x2), urb(0xee845000, 36, 36), status(0x0, 0x0)
[  208.180000] g: urb(0xee845000, sg_complete+0x0/0x198, 0, 36, 36), dev(2), ep1in

Note: TX to hw_ep2 works:

[ 3504.520000] musb-hdrc musb-hdrc: qh eeb75680 periodic slot 2
[ 3504.520000] musb-hdrc musb-hdrc: qh eeb75680 urb eebdf680 dev2 ep2out-bulk, hw_ep 2, eeb62780/31
[ 3504.520000] musb-hdrc musb-hdrc: --> hw2 urb eebdf680 spd3 dev2 ep2out h_addr00 h_port00 bytes 31
[ 3504.520000] musb-hdrc musb-hdrc: TX ep2 fifo f1c13008 count 31 buf eeb62780
[ 3504.520000] musb-hdrc musb-hdrc: Start TX2 pio
[ 3504.580000] musb-hdrc musb-hdrc: ** IRQ host usb0008 tx0004 rx0000
[ 3504.580000] musb-hdrc musb-hdrc: <== Power=70, DevCtl=5d, int_usb=0x8
[ 3504.580000] musb-hdrc musb-hdrc: OUT/TX2 end, csr 2100
[ 3504.580000] musb-hdrc musb-hdrc: complete eebdf680 usb_stor_blocking_completion+0x0/0x8 (0), dev2 ep2out, 31/31

Notes:
 - Allwinner OTG driver is based on musb.
   * for example, AW driver contains changes from upstream commit f82a689faeb.
 - sw_usb has DMA code disabled and PIO only mode is used.
 - Allwinner/sunxi musb register offsets are different from Texas Instruments'.
   Currently this is not problem, as musb only supports one "Platform Glue
   Layer" at a time (see ifdefs in current code). If multiarch is added to
   musb, musb needs to be changed to support different register mappings on
   runtime.

not-yet-signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>