CPU: Clarify register selection in macros, clear up references to register r
CACHE: Structure to store traversal information

Record information about which memory locations have been visited,
and whether they hold instructions, immediate-mode data, or are (by
inference) not executable or have not yet been executed.
CACHE: Transcribing expected coverage for BIOS code

Manually decoded and executed BIOS dump to identify landing sites
and instructions. This data should be usable as a starting point
for generating LLVM blocks, as it is functionally equivalent to
execution in a regular cartridge.
CPU: Provide more comprehensive metadata for ops