llvm/test/Object/directory.ll: Mark it as XFAIL:cygwin. Directories can be opened on cygwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186387 91177308-0d34-0410-b5e6-96231b3b80d8
This patch allows targets to define weather the instruction mnemonics in asm matcher tables will contain '.' character.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186388 91177308-0d34-0410-b5e6-96231b3b80d8
ARM EABI divmod support

This patch enables calls to __aeabi_idivmod when in EABI mode,
by using the remainder value returned on registers (R1),
enabled by the ARM triple "none-eabi". Note that Darwin and
GNUEABI triples will continue lowering on GNU style, that is,
using the stack for the remainder.

Still need to add SREM/UREM support fix for 64-bit lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186390 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: implement ldrex, strex and clrex intrinsics

Intrinsics already existed for the 64-bit variants, so these support operations
of size at most 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186392 91177308-0d34-0410-b5e6-96231b3b80d8
PPCJITInfo.cpp: Tweak r186252 with s/__ppc/__powerpc/ to work on powerpc-linux Fedora 12.

    g++ (GCC) 4.4.4 20100630 (Red Hat 4.4.4-10)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186396 91177308-0d34-0410-b5e6-96231b3b80d8
 This patch represents Mips utilization of r186388 code that alows asm matcher to emit mnemonics contain '.' characters. This makes asm parser code simpler and more efficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186397 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "implement PR9264: disambiguating 'bt mem, imm' as a btl."

This reverts commit 824a9076eaf8d109bc79f53e51b7d7a045f42552.  It takes
the wrong approach to the problem by always disambiguating the $imm form
of bt as btl, like GNU as.  The problem will be solved correctly in the
next commit.

Cc: Stephen Checkoway <s@pahtak.org>
Cc: Tim Northover <t.p.northover@gmail.com>
Cc: Jim Grosbach <grosbach@apple.com>
Cc: Chris Lattner <sabre@nondot.org>
Signed-off-by: Ramkumar Ramachandra <artagnon@gmail.com>
X86: infer immediate forms of bit-test instructions

The instruction mnemonics for the immediate forms of bit-test
instructions including bt, btr and bts, btc do not work.  llvm-mc barfs
with:

  error: ambiguous instructions require an explicit suffix

This is highly user-unfriendly, since we can easily infer what the user
meant by inspecting $imm and translating the instruction appropriately.
Do it exactly as the Intel manual describes.  Note that we are the first
major assembler to do this properly: neither GNU as nor NASM does the
right thing currently.

Cc: Stephen Checkoway <s@pahtak.org>
Cc: Tim Northover <t.p.northover@gmail.com>
Cc: Jim Grosbach <grosbach@apple.com>
Cc: Chris Lattner <sabre@nondot.org>
Signed-off-by: Ramkumar Ramachandra <artagnon@gmail.com>