Update comment slightly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186548 91177308-0d34-0410-b5e6-96231b3b80d8
Get rid of the Dis/EnableDebugLocations() API.
I'm moving this functionality into clang instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186549 91177308-0d34-0410-b5e6-96231b3b80d8
Give 'hasPath' a longer but clearer name 'isPotentiallyReachable'. Also expand
the comment. No functionality change. This change broken out of
http://llvm-reviews.chandlerc.com/D996 .


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Fix a regression I introduced back in r178147.

We don't want cast and dyn_cast to work on temporaries. They don't extend
lifetime like a direct bind to a reference would, so they can introduce
hard to find bugs.

I added tests to make sure we don't regress this. Thanks to Eli Friedman for
noticing this and for his suggestions on how to test it.

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Convert two uses if fstat with sys::fs::status.

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Remove dead code.

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PPC: Support dynamic allocas with large alignment

Support for dynamic stack alignments in the PPC backend has been unfinished, in
part because it depends on dynamic stack realignment (which I only just
recently implemented fully). Now we can also support dynamic allocas with
higher than the default target stack alignment (16 bytes).

In order to round-up the requested size to the maximum requested alignment, we
need an additional register to hold the rounded-up size. We're already using one
scavenged register to hold the previous stack-pointer value (which needs to be
stored with the signal-safe stdux update), and so when we have dynamic allocas
and a large alignment, we allocate two emergency spill slots for the scavenger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186562 91177308-0d34-0410-b5e6-96231b3b80d8
SLPVectorizer: Speedup isConsecutive (that checks if two addresses are consecutive in memory) by checking for additional patterns that don't need to go through SCEV.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186563 91177308-0d34-0410-b5e6-96231b3b80d8
Reapply r186316 with a fix for one bug where the code could walk off the
end of a vector. This was found with ASan. I've had one other report of
a crasher, but thus far been unable to reproduce the crash. It may well
be fixed with this version, and if not I'd like to get more information
from the build bots about what is happening.

See r186316 for the full commit log for the new implementation of the
SROA algorithm.

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Fix copy and paste bug from r186491 to make v2f64 use MOVAPD/MOVUPD as it should.

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This patch extends mips register parsing methods to allow indexed register parsing. The corresponding test cases are added to the patch.

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Remove the extra leading 0 from VMAXNMND.
The N3VDIntnp pattern takes bits<5> and I gave it 6 bits.

Thanks to Jiangning Liu for spotting it!


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[SystemZ] Rename and formatting fixes

In hindsight, using "RISBG" for something that can be any type of
R.SBG instruction was a bit confusing, so this renames it to RxSBG.
That might not be the best choice either, since there is an instruction
called RXSBG, but hopefully the lower-case letter stands out enough.

While there I fixed a couple of GNUisms that had crept in --
sorry about that!


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[SystemZ] Use RXSBG

Extend the previous R.SBG patches to handle XORs.


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[SystemZ] Generalize RxSBG SRA case

The original code only folded SRA into ROTATE ... SELECTED BITS
if there was no outer shift.  This patch splits out that check
and generalises it slightly.  The extra cases aren't really that
interesting, but this is paving the way for RNSBG support.


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Add Thumb tests for the ARMv8 FP instructions that I recently added.

Also, fix the namespace for two instructions that I missed previously.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186572 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Use RNSBG

This should be the last of the R.SBG patches for now.


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[ARMv8] Add NEON instructions VCVT{A, N, P, M}.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186574 91177308-0d34-0410-b5e6-96231b3b80d8
Change 'n' to 'N' to keep consistent with other instructions.


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Forgot 'svn add' again, sorry!

Tests for r186574.


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