mesa: consolidate cube width=height error checking

Instead of checking width==height in four places, just do it in
_mesa_legal_texture_dimensions() where we do the other width, height,
depth checks.  Similarly, move the check that cube map array depth is
a multiple of 6.

This change also fixes some missing cube dimension checks for the
glTexStorage[23]D() functions.

Remove width==height assertion in _mesa_get_tex_max_num_levels() since
that's called before the other size checks for glTexStorage.

Cc: "9.2" <mesa-stable@lists.freedesktop.org>
vbo: access VBO memory more efficiently when building display lists

Use GL_MAP_INVALIDATE_RANGE, UNSYNCHRONIZED and FLUSH_EXPLICIT flags
when mapping VBOs during display list compilation.  This mirrors what
we do for immediate-mode VBO building in vbo_exec_vtx_map().

This improves performance for applications which interleave display
list compilation with execution.  For example:

glNewList(A);
glBegin/End prims;
glEndList();
glCallList(A);
glNewList(B);
glBegin/End prims;
glEndList();
glCallList(B);

Mesa's vbo module tries to combine the vertex data from lists A and B
into the same VBO when there's room.  Before, when we mapped the VBO for
building list B, we did so with GL_MAP_WRITE_BIT only.  Even though we
were writing to an unused part of the buffer, the map would stall until
the preceeding drawing call finished.

Use the extra map flags and FlushMappedBufferRange() to avoid the stall.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
mesa: update glext.h to version 20131008

Only two notable changes in this revision:
* GLvoid has been replaced by void.
* Added the GL_NV_blend_equation_advanced extension.
mesa: update glxext.h to version 20131008

The diff is huge but the actual changes are few:
* Whitespace changes
* Items are reordered
* extern qualifiers dropped
cso: fix incorrect sampler view count in cso_restore_sampler_views()

During the recent bind_sampler_states() interface change in gallium
we changed the CSO single_sampler_done() function so that if we were
decreasing the number of sampler states bound in the driver, we'd
null-out the "extra/old" sampler states to unbind them.  See commit
1e2fbf265.

However, we didn't make the corresponding fix for sampler views.
This caused an assertion to fail in the svga driver which checked
that the number of sampler views matched the number of sampler states.

This patch fixes cso_restore_sampler_views() so that it nulls-out
the extra/old sampler views if the number of new views is less than
the number of current/old views.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
svga: minor fix-ups in svga_get_shader_param()

Fix debug error message.  Add switch case for PIPE_SHADER_COMPUTE.
Trivial.
mesa: change glTexImage[23]DMultisample() internalformat to GLenum

To match glext.h and the GL_ARB_texture_multisample extension.
However, the GL 4.0 spec and man page say it's GLint.
An OpenGL spec bug will be filed.
clover: Link libclc before running any optimizations

This is required in order for clang to correctly handle the OpenCL C
barrier() builtin which has the following restrictions acording to
the OpenCL 1.1 Specification:

If barrier is inside a conditional statement, then all work-items must
enter the conditional if any work-item enters the conditional statement
and executes the barrier.

If barrier is inside a loop, all work-items must execute the barrier for
each iteration of the loop before any are allowed to continue execution
beyond the barrier.

By linking before otimizations, we can replace calls to barrier() with
calls to a target specific intrinsic which has the noduplicate attribute
This attribute prevents clang from performing optimizations which could
violate the above rules.

This attribute must be applied to the call instruction that invokes
the function, so it is not enough to add this attribute the barrier()
declaration.

As a bonus this will probably speed up compile times since we will no
longer need to run link-time optimizations.
r600g/compute Improve debugging output
radeonsi: Use 'SI' as the LLVM processor for CIK on LLVM <= 3.3

LLVM 3.3 does not know about CIK processors, and the codes paths for SI
and CIK are the same.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Revert "scons: Fix build when rtti is disabled"

This reverts commit 94d05bf87a21bd364e84f699a0064e5fba58a6f9 as it has a
few problems:

- it breaks windows builds becuase env[LLVM_CXXFLAGS] is never set there

- it is merging not only rtti, but the whole cxxflags (defines etc)
  which has proven to be a source of troubles (breaks debugging etc.)
i965: Print instructions' children during scheduling debugging.

Useful for tracking down problems in dependency calculations.

Scheduling debugging now prints:

clock    2, scheduled: linterp vgrf5, hw_reg2, hw_reg3, hw_reg0,
        child 0, 53 parents: fb_write (null), (null), (null), (null),
        child 1, 2 parents: tex vgrf4, vgrf5, (null), (null),
        child 2, 52 parents: placeholder_halt (null), (null), (null), (null),
clock    4, scheduled: linterp vgrf5+1, hw_reg2, hw_reg3, hw_reg0+16,
        child 0, 52 parents: fb_write (null), (null), (null), (null),
        child 1, 1 parents: tex vgrf4, vgrf5, (null), (null),
                now available
        child 2, 51 parents: placeholder_halt (null), (null), (null), (null),

Reviewed-by: Eric Anholt <eric@anholt.net>
i965/fs: Handle printing HW_REGS in dump_instruction().

Scheduling debugging now prints:

Instructions before scheduling (reg_alloc 1)
0: linterp vgrf20, hw_reg2, hw_reg3, hw_reg4,
1: linterp vgrf21, hw_reg2, hw_reg3, hw_reg4+16,

Reviewed-by: Eric Anholt <eric@anholt.net>
glsl: Optimize mul(a, -1) into neg(a).

Two extra instructions in some heroesofnewerth shaders, but a win for
everything else.

total instructions in shared programs: 1531352 -> 1530815 (-0.04%)
instructions in affected programs:     121898 -> 121361 (-0.44%)

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glapi: Add missing XML files to Makefile dependencies.

Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
r600g/sb: fix issue with DCE between GVN and GCM (v2)

We can't perform DCE using the liveness pass between GVN and GCM
because it relies on the correct schedule, but GVN doesn't care about
preserving correctness - it's rescheduled later by GCM.

This patch makes dce_cleanup pass perform simple DCE
between GVN and GCM instead of relying on liveness pass.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70088

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Revert "i965: Create ARGB2101010 DRI configs"

Exposing 10-bit color configs confuses too many applications that try to
use the chooser to pick an 8 bit config.  The chooser consider an fbconfig
with more bits a better match and will thus give a 10 bit config when an
application asks for a config with GLX_RED_SIZE 1 or 8.

One key example is glxinfo, which does this, and then doesn't specify that
it needs a config where GLX_DRAWABLE_TYPE has the GLX_WINDOW_BIT set.
This way it ends up with a 10 bit config that it can't use to create a
GLX window and fails to log extensions.

This reverts commit f354bcc1770e9df88db51eba5a4543a09ca6d128.

https://bugs.freedesktop.org/show_bug.cgi?id=70557
mesa/st: Add VARYING_SLOT_TEX[1-7] to st_translate_geometry_program().

v2 (Paul Berry <stereotype441@gmail.com>: Split out to separate patch
(previously this was part of "glsl: add builtins for geometry
shaders.")

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
st/mesa, glsl_to_tgsi: add support for geometry shaders

v2 (Bryan Cain <bryancain3@gmail.com>): fix 2D array indexing order.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
mesa/st: Allow geometry shaders without gl_Position export.

From the ARB_geometry_shader4 spec (section Geometry Shader outputs):
"The built-in special variable gl_Position is intended to hold the
homogeneous vertex position. Writing gl_Position is optional."

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>