hwcomposer: disable vsync based on board preference

follow only the board preference instead of checking both platform and
board preference

Change-Id: I9fa5d6392f6b1677cb7b3809ee5207ada8e1fd5b
hwcomposer: fixes for hwc c2d composition

- c2d composition has to be used even the when renderArea equal
  to twice the fbArea.  This change enables this.
- set the default dynThresHold as 2

(cherry picked from commit 70e85f1d2e115203075a7bd715e7c0f763f41536)

Change-Id: I0c1e0dbc35f07a55a550e812a1ad1084168a1de1
CRs-Fixed: 396227
libhwcomposer:Ensure VG pipe is allocated for video

In case of VCAP, video format is RGB_888. Since
post-proc features are to be supported on video,
and CSC blocks are available on VG pipes, it is
necessary to ensure that VG pipe is allocated for
video data when requested. This is done by setting
OV_MDP_PIPE_SHARE flag.

Change-Id: Iccc8832d12335bc869215de8d7b70721c112c52b
liboverlay: Fix rotator memory leak on hdmi resolution change

-On hdmi resolution change close pipe is getting fail as pipe
is already freed in dtv off.This doesn't allow rotator free
call and add memory leak.
-Add support for rotator free call even close pipe fail.

Change-Id: Ide848cb00c643782599c91b95b79c6b4b4986145
CRs-Fixed: 408959
display/libhwcomposer: Fix memory leak in MDP Comp.

This changes fixes a memory leak by freeing up pipe alloc
structure everytime before parsing the current frame.

Change-Id: I23edefca71ec0209291be24ee9d629b4a80f0a25
display: Add support for 180 flip operation

This changes adds support for 180 degree flip operation during
MDP composition. This enables frames to get MDP composited during
270 degree orientation too (with pre rotation doing 90 degree
rotation)

Change-Id: I225088e0eed083f145a0166b06aac3d0e4355505
hwcomposer : Synchronize EventThread, and hwcVsyncThread

Synchronization is needed,to make sure, read() is not called
by hwcVsyncThread when VSYNC is disabled.

Otherwise in usecases, where display is OFF, and still some
tasks keep running in the background; SurfaceFlinger keeps
using CPU.

Change-Id: Ic59d0c477bc8483dd731777ebde3cc9e12bb681a
CRs-Fixed: 393243
hwc: fixes for vsync and race conditions

- Fix some race conditions between hwc_eventControl and the hwcVsyncThread.
- don't call vsync-ctrl ioctl for same enable value
- move enable disable ioctls to vsync thread, this stabilizes the vsync
  signal
- read again if vsync read is interrupted

Change-Id: I4065918b352769dd9fe18bd0dff4a87053299189
CRs-Fixed: 393243
CRs-Fixed: 416487
hwc: dont return from vsync thread when read fails.

Read can return fail when the panel is off.
When read fails do not exit from the vsync thread,
continue with the vsync signal, as later there will
be correct vsync event from the driver

Change-Id: I0f145b93fe5d365eafb6b9e7661160f00f84db40
CRs-Fixed: 417529
overlay: Consider both directions for downscaling

Since downscale in rotator is applied to both width and height, the downscaling
decision should be made based on the area rather than just the width or height.

Change-Id: Ib1c7eccc6c430a401b6d8abb1d9bb0927d05869c
copybit: Use correct alignment in get_size()

get_size() is used to get the size required by c2d. It's alignment
should be 32 and not 16.

(cherry picked from commit 35d45d0cff5f6fe866fcb5df71444824a45e046e)

Change-Id: Iace771104ce8cea8b1672d15b2d46b6de9283868
Fix compile with NO_HW_VSYNC

Change-Id: Id5436afc69e97abf8b48cc938f44ebd0f87b514b
Revert "display: Enable MDP pixel repeat on MDP Composition."

This reverts commit ff34b6fe49b81ae90f978490150c23932adacc4d.

Change-Id: I4f405276a2b29228c99d702e14693f3de02d9c57
libcopybit: draw full layer if dirty region list is long

1. Since blitting region by region by copybit is serial, if a layer has
long list of dirty regions, drawing full layer is optimal. Make blit
region same as display frame of layer.
2. Fix alpha for HWC_BLENDING_NONE layers

(cherry picked from commit 57f0723baf97d0f6499458d6764d1416baa18b4f)

Change-Id: Ib08a292e4845259cfb313ca07db34da9f9200dec
HWC/copybit : Add support for isFG in copybit

Some applications are sending the RGBA layer with constact alpha
0xFF and isOpaque=1. For these types of layer we are not getting
any wormHole regions.Hence we are seeing the previous content (framebuffer)
due to wrong selection of blending logic at kernel side.

For fixing these type of issues for MDP3 we are making Z order zero
layer as FG same as MDP4 to choose proper blending logic.

(cherry picked from commit 68a0f20dd31a753abdefd0be64287d93f03036cc)

Change-Id: I73bf70b066e680e30194d655b2f9e46bf4bc85e9
CRs-fixed: 405802
CRs-fixed: 406503
CRs-fixed: 386356
hwcomposer: Mark Video layer to GPU if any other layer is marked with GPU

Change-Id: Ib25f008ba0979f51fb811bd1c2b86199ac4216c9
CRs-fixed: 436277