tweaks and bug fixes...

discovered erroneous side effect with setting sreg.
few errors in handling flags.
some ommisions with flag handling found in main core...  needs bugfix upstream.
some common instruction sequences folded together.

	modified:   simavr/sim/sim_avr.c
	modified:   simavr/sim/sim_core.c
	modified:   simavr/sim/sim_fast_core.c