Merge pull request #543 from mmp/master

Fix build with LLVM top-of-tree
Merge pull request #544 from mmp/master

Handle SHL with a constant vector in LLVMVectorIsLinear().
Release 1.4.4
Changing ISPC version to 1.4.5dev
Merge pull request #546 from dbabokin/release

Release 1.4.4
Replace inline assembly in task system with equivalent gcc intrinsics.

gcc/icc build only: the Windows build still uses the Win32 calls for
these.
Add support for ARM NEON targets.

Initial support for ARM NEON on Cortex-A9 and A15 CPUs.  All but ~10 tests
pass, and all examples compile and run correctly.  Most of the examples
show a ~2x speedup on a single A15 core versus scalar code.

Current open issues/TODOs
- Code quality looks decent, but hasn't been carefully examined.  Known
  issues/opportunities for improvement include:
  - fp32 vector divide is done as a series of scalar divides rather than
    a vector divide (which I believe exists, but I may be mistaken.)
    This is particularly harmful to examples/rt, which only runs ~1.5x
    faster with ispc, likely due to long chains of scalar divides.
  - The compiler isn't generating a vmin.f32 for e.g. the final scalar
    min in reduce_min(); instead it's generating a compare and then a
    select instruction (and similarly elsewhere).
  - There are some additional FIXMEs in builtins/target-neon.ll that
    include both a few pieces of missing functionality (e.g. rounding
    doubles) as well as places that deserve attention for possible
    code quality improvements.

- Currently only the "cortex-a9" and "cortex-15" CPU targets are
  supported; LLVM supports many other ARM CPUs and ispc should provide
  access to all of the ones that have NEON support (and aren't too
  obscure.)

- ~5 of the reduce-* tests hit an assertion inside LLVM (unfortunately
   only when the compiler runs on an ARM host, though).

- The Windows build hasn't been tested (though I've tried to update
  ispc.vcxproj appropriately).  It may just work, but will more likely
  have various small issues.)

- Anything related to 64-bit ARM has seen no attention.
Explicitly set armv7-eabi target triple on ARM.

This lets the compiler generate FMA instructions, which seems
desirable.
Merge pull request #547 from mmp/arm-merge

Add ARM NEON support
Fix build with LLVM top-of-tree.

The DIBuilder::getCU() method has been removed; we now just store the
compilation unit returned when we call DIBuilder::createCompileUnit.
Improvements to constant folding.

We can now do constant folding with all basic datatypes (the previous
implementation handled int32 well, but had limited, if any, coverage
for other datatypes.)

Reduced a bit of repeated code in the constant folding implementation
through template helper functions.
Merge pull request #549 from mmp/fix-tot

Fix build with LLVM top-of-tree.
Merge branch 'master' of https://github.com/ispc/ispc into constfold
Improve warnings for right shift by varying amounts.

Fixes:
- Don't issue a warning when the shift is a by the same amount in all
  vector lanes.
- Do issue a warning when it's a compile-time constant but the values
  are different in different lanes.

Previously, we warned iff the shift amount wasn't a compile-time constant.
Add support for fast division of varying int values by small constants.
    
For varying int8/16/32 types, divides by small constants can be
implemented efficiently through multiplies and shifts with integer
types of twice the bit-width; this commit adds this optimization.
    
(Implementation is based on Halide.)
Add support for mask vectors of 8 and 16-bit element types.

There were a number of places throughout the system that assumed that the
execution mask would only have either 32-bit or 1-bit elements.  This
commit makes it possible to have a target with an 8- or 16-bit mask.
Reduce estimated costs for 8 and 16-bit min() and max() in stdlib.

These actually compile to a single instruction.
Choose type for integer literals to match the target mask size (if possible).

On a target with a 16-bit mask (for example), we would choose the type
of an integer literal "1024" to be an int16.  Previously, we used an int32,
which is a worse fit and leads to less efficient code than an int16
on a 16-bit mask target.  (However, we'd still give an integer literal
1000000 the type int32, even in a 16-bit target.)

Updated the tests to still pass with 8 and 16-bit targets, given this
change.
Fix bug in lGetConstantInt() in parse.yy.

Previously, we weren't handling signed/unsigned constant types correctly.
Use @llvm.readcyclecounter to implement stdlib clock() function.

Also added a test for the clock builtin.