PDP10: Support 18-bit CSRs

The PDP10 has an 18-bit Unibus.  Allow devices identified as 18-bit to get 18-bit data
from the IO instructions.

Adds a flags word to the DIB, optional, defaults to 16-bit registers to ensure compatibilty
with 16-bit peripherals.

(Actually, permits writes of up to 32-bit registers - any 18-bit device is responsible for
ignoring bits that it doesn't use.  This is a performance optimization for the 16-bit
case (saves a branch) and provides future flexibility for special emulations.)

Also, in Map_WriteW18, defend against a device that tries to write more than 18 bits.

8 & 16-bit writes don't need this because their input is only 8 or 16 bits wide.  (18-bit writes
use a unit32 buffer).