i965/fs: Remove bogus field prog_data->dispatch_width.

Despite the name, this field wasn't being set to the dispatch width at
all; it was always 8.  The only place it was used was that the
constant buffer read length was aligned to it, and as far as I can
tell from the docs, there is no need to align this value to the
dispatch width; aligning it to a multiple of 8 is sufficient.  So I've
just replaced it with a hardcoded 8.
i965: Clean up "VUE map" nomenclature.

When the "VUE map" data structure was first introduced, it was a
mapping from a gl_vert_result to a location within the vertex URB
entry which I called a "slot".

Things got a little muddy when gl_vert_result was renamed to
gl_varying_slot, so the VUE map became a mapping from gl_varying_slot
to "slot".

Future patches in this series are going to extend the VUE map to also
handle fragment shader inputs, which aren't addressed by their
location within the VUE at all, but rather by the order in which they
are listed in the 3DSTATE_SF or 3DSTATE_SBE command.  So to avoid any
more confusion, this patch adjusts the nomenclature so that the VUE
map is simply called a "varying map", and it maps varyings to generic
indices.  The following renames are performed:

vue_map -> varying_map
varying_to_slot -> varying_to_index
slot_to_varying -> index_to_varying
num_slots -> num_indices
brw_vue_slot_to_offset -> brw_index_to_offset
i965: Make assign_varying_index available outside brw_vs.c, re-use in brw_sf.c.
i965: Add some missing bits to {mesa,brw,cache}_bits[].

These data structures are used for debug output, so it wasn't hurting
anything that there were missing bits.  But it's good to keep things
up to date.

This patch also adds static asserts so that the {brw,cache}_bits[]
arrays are the proper size, so that we don't forget to add to them in
the future.  Unfortunately there's no convenient way to assert that
mesa_bits[] is the proper size.