[TASK] Fix simulate.sh to preserve path in results directory

This change is necessary for future testbenches that use different
architectures.

Change-Id: I433c4509c3fe635fb216cf15ffcdc78fd8410217
Reviewed-on: http://brateggevoat1/gerrit/1420
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[TASK] Add possibility to add vsim and vcom arguments to simulation script

- This enables forwarding specific parameters to VHDL compilation and
  simulation (e.g. suppress errors).
- Delete extra optimization flag.

Change-Id: I6f6327d1d06a83696d9e54c2794575ffd8813e87
Reviewed-on: http://brateggevoat1/gerrit/1421
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[TASK] Update DPRAM library component

- Add initialization file generic
- Add Xilinx implementation
- Add testbenches for verification

Change-Id: Id2fb609fbc1a6e4b2d6bb76fd4304fa49410438f
Reviewed-on: http://brateggevoat1/gerrit/1422
Tested-by: Jenkins <jenkins@brateggevoat1.br-automation.co.at>
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>