Disable mdp axi clock gating.

Change-Id: I442a311652d99b18697a6c311aee253247e76c81
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Revert "diag: Add sanity check for data"

This reverts commit 6fc08a060ede43cf1bbaf671274c65eb9f8d217c

Change-Id: Idad05d8a5f461b0ad0ea28226d6bc157b78846dd
Signed-off-by: James Melvin <jmelvin@codeaurora.org>
Revert "m_dmux: Remove extra refcounting for clocks"

This reverts commit 260900bf7b94811fc285cb0fca58431e7410cc40

Change-Id: Ib03d9963e0e14c488f36540198c204f3c43ee2ff
Signed-off-by: James Melvin <jmelvin@codeaurora.org>
msm: acpuclock-8960: Enable Krait v1 workarounds on Krait v2

Like Krait v1, Krait v2 requires its clocks to be sourced from
the QSB to reliably enter and exit power-collapse. Extend this
fix to apply to Krait v2, also.

Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
(cherry picked from commit badae0072329555e88d9a6ef181ba4effba3bd0e)

Change-Id: Ibbdc768f962e6f98e2475d59ef1ddaa10c7f67bc
Signed-off-by: Yen-Pin Hsiao <yphsiao@codeaurora.org>
Revert "Disable mdp axi clock gating."

This reverts commit 72c96d7ea73be5b0ba5afb1e3fb4fdc8bfacafc4.

Change-Id: I71f2758cfae2614d4bd10083fa6388f09e745601
Signed-off-by: Zhoulu Luo <zluo@codeaurora.org>
jRevert "Revert "Disable mdp axi clock gating.""

This reverts commit 373af7de9f00b192b6f89edf6fe1be70f2826739.

Change-Id: Ie79ef3e8fc6e725ed627e6e39d0ec15d43d67579
Signed-off-by: Zhoulu Luo <zluo@codeaurora.org>
msm: clock-8xxx: Duplicate gfx2d frequency table for gfx2d1

The gfx2d clocks are getting stuck off randomly when the clock
is turned on. With clocks that are glitch-free dual banked clocks
we use the frequency tables to store information about the mn
enable bits. At compile time, both mn enable bits are set in the
frequency pointer (BIT(8) | BIT(5)). At runtime, the mnd_en_mask
is updated to reflect the current bank that's selected. The
mnd_en_mask is used to turn on the mn counter for the bank that's
being used.

This is all fine except that for gfx2d there are two clocks and
these two clocks share the same frequency table. This means that
gfx2d0 can change its rate and land on bank0 and gfx2d1 can
change its rate and land on bank1. If the two clocks are "out of
phase" and one clock is using bank0 and the other clock is using
bank1 we'll get into a situation where the frequency table will
reflect settings for one clock configured for bank0 and when we
go to enable the clock on bank1 it will program the incorrect
mn enable bit.

When this occurs the clock will have its correct bank chosen but
the mn counter will be off and the counter mode will not be
bypass. This will cause the bank to never turn on and then the
clock will get stuck.

Duplicate the tables so that both gfx2d cores can be used at the
same time and not conflict.

CRs-Fixed: 333496
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit ff8f57f46a0485a0a19809af7847a16136564298)

Conflicts:

	arch/arm/mach-msm/clock-8960.c

Signed-off-by: Srivalli Oguri <oguri@codeaurora.org>
(cherry picked from commit e0fe23da200cea58a6363b8bd2791136399b64d7)

Change-Id: I2a4d97164a4e1128ac640a5880a8108f9c3aed28
Signed-off-by: Yen-Pin Hsiao <yphsiao@codeaurora.org>
Revert "Revert "diag: Add sanity check for data""

This reverts commit 56e7cdda89fe11dbc9ae0a9f840d758a48f7e25d.

Change-Id: Ie267d59b80d495fb3374de4111ad519a350f4ac4
Signed-off-by: Zhoulu Luo <zluo@codeaurora.org>
diag: Avoid partial packet reads

DIAG driver talks to peripheral processors over SMD channels.
Sometimes, SMD channel can have a partial packet and if diag
reads it, it can mistake them as garbled packets. With this
change, if the packet is incomplete, diag will not read it
and wait until the packet is complete.

This approach will work, as long as, peripheral is sending packets
less than 1000 bytes. Currently even the peripheral is limited to
sending packets upto 1K bytes, so this limitation is fine.

Also fix potential memory allocation failure and unnecessary
reading from SMD channels.

Change-Id: I86e6aa202d1e1159e7b3f099cb1228530489a370
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
Merge "msm: clock-8xxx: Duplicate gfx2d frequency table for gfx2d1" into ics_chocolate
Merge "Bluetooth: Require streaming mode when it is requested for a socket" into ics_chocolate
diag: Add sanity check for data

DIAG driver communicates to peripherals over SMD channels. It parses
data read and then takes appropriate actions. Sometimes, SMD can pass
corrupted data and cause DIAG driver to crash. Adding checks around
data will prevent such crashes.

CRs-fixed: 336908
Signed-off-by: Shalabh Jain <shalabhj@codeaurora.org>
(cherry picked from commit f50076b757c85b2249aa57ba5c09d44be70da6a9)

Change-Id: I25e28de19b4108c5e334460e66d6b87923078379
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
msm: video: Update macros to use readl/writel

Currently, video code uses macros other than readl/writel
to read/write from memory mapped registers. While technically
correct, this prevents readl/writel logging from working as
expected. Change the video macros to use readl/writel
internally.

Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
(cherry picked from commit 51c0e6541a6eab7510def11804fb0b379d093b89)

Change-Id: I50e534a701ba141aee82e27a02a5121b7ff18f7a
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
Merge "msm: 8960: usb: Add msm_bus vote when cable is connected" into ics_chocolate
Merge "diag: Add sanity check for data" into ics_chocolate
Merge "msm: video: Update macros to use readl/writel" into ics_chocolate
msm: allow memory pools to be created from multiple memory banks

On platforms which require very large memory pools, it
might not be possible to create such a memory pool from
a single memory bank (even though there may be several
contiguous memory banks of the same memory type), and
the memory pool created would then be smaller than requested.

Allow multiple contiguous memory banks to be used in the
creation of memory pools, making it more likely that a
large memory pool can be created of the desired size.

CRs-Fixed: 333361
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
(cherry picked from commit 48e4f5f31c19f1b9e5f54cdba61beeec434c8c56)

Change-Id: I51a033e65bd42bd65f85b09c0d1700f142be2108
Signed-off-by: Yen-Pin Hsiao <yphsiao@codeaurora.org>
radio: iris: Add support for FM Subsystem Restart

Inject FM Disable event when WCNSS resets.

1. When WCNSS crashes, SMD will close the FM port
2. Schedule a work queue to send RADIO_DISABLED event to upper layer.

Signed-off-by: Sunny Kapdi <sunnyk@codeaurora.org>
(cherry picked from commit 0f69eb40055f94b293e9723f1d16ba9786a6eb82)

Change-Id: I22acce47a8e5ecbc27d049bd2d58d3bd4a79bc48
Signed-off-by: Yen-Pin Hsiao <yphsiao@codeaurora.org>
tzcom: Unload tzapp on closing the device handle

In a scenario where the client application crashes, tzapps is left
running on the secure domain.  When a client application crashes,
the tzapp (loaded during open) needs to be unloaded to clean off
the tzapps state machine.

Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
(cherry picked from commit 67e1cbe2e905d1ff1457de59bb6789e0fac97279)

Change-Id: Ie0e7f75c8b58a1bd322a1d7a572f9c6df26e2256
Signed-off-by: Yen-Pin Hsiao <yphsiao@codeaurora.org>
msm: bam_dmux: Vote for CXO when bam is in use

CXO is not always guaranteed to be on when the system is running.
For example, when usb is unplugged and the modem is power
collapsed there are no votes for CXO in the system and thus CXO
can be shut off.

Unfortunately, bam_dmux is relying on a clock that is sourced
from CXO to turn on automatically when the a2bam is accessed.
Since the clock is hardware controlled CXO must be on or the
access to the a2bam will stall waiting for the clock to turn on.

Therefore, whenever the a2 bam is accessed turn on the CXO clock
as well so that the hardware clock can turn on and the access can
work.

Change-Id: I9be04a8091f071092cb921e89e3fc8d83aa33005
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Praveena Pachipulusu <pveena@codeaurora.org>
(cherry picked from commit 95e479e36569bbf6e7a03b1aacb98ce1af5785a2)