msm_fb: display: Evenly balancing load on MDP ports

Moving RGB1 and RGB2 to AXI port 1. This fixes underrun issues seen
on External display while playing videos. This patch evenly balancing
pipe loads on each port.

CRs-Fixed: 458421

Change-Id: I975f580d36bffb697f466afb63da6dc990e1127e
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Merge "msm_fb: display: Evenly balancing load on MDP ports"
msm: pm2: Restore interrupt subsystem from sleep.

Change-Id: Id5128e47e1e78688d0b608b64454555f26a65043
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
Signed-off-by: Baji Patthan <bpatth@codeaurora.org>
Merge "msm: pm2: Restore interrupt subsystem from sleep."
msm: kgsl: fix paren placement leading to fence timeout

The incorrect paren placement can lead to a fence timeout
because the last_timestamp is always written. As a result
the last_timestamp could be corrupted by writing an old
value leading to a future timestamp_cmp indicating that a
signaled sync pt was unsignaled.

Change-Id: I4650a467bfdd98a905f86fbec7d833596c67ba19
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Merge "msm: kgsl: fix paren placement leading to fence timeout"
msm_fb : Modify mixer staging down during OVERLAY_UNSET

Commit the mixer for the base pipe to avoid primary going blank
while video playaback and suspend resume concurrency test.

Change-Id: I08d00b7331d510ca32fcc5fd372c406297738382
Signed-off-by: Neti Ravi Kumar <ravineti@codeaurora.org>

CRs-Fixed: 469494
Signed-off-by: Neti Ravi Kumar <ravineti@codeaurora.org>
Merge "msm_fb : Modify mixer staging down during OVERLAY_UNSET"
msm_fb: display: Avoid MDP clock disable during DMA update

MDP Core clock gets disabled by clock control thread during Idle
screen update with MDDI. But, this thread's action can conflict
with a late frame update call. This change adds safety checks to
avoid this conflict.

Change-Id: Id1d6fd4a66bab91075f285cdbe5fec2406d1fb79
Signed-off-by: lakshmi narayana p <lpatib@codeaurora.org>
Merge "msm_fb: display: Avoid MDP clock disable during DMA update"
USB: ci13xxx_udc: Don't free dTD immediately after active bit is cleared

USB controller may access the dTD one more time after clearing the active
bit in token field.  There is a possibility of software freeing it in this
window.  When this happens, USB controller may access incorrect memory and
leads to system level issues.

dTDs are freed when requests are freed by function drivers during
disconnect or unbind.  The above race condition will come into effect only
for zero length packets.  dTDs are dynamically created for sending zero
length packets on IN endpoints.  These dTDs are immediately freed after
active bit is cleared.  Defer this to next dTD completion.  It is safe to
assume that hardware will no longer access the previous dTD when the next
dTD is completed.

Don't allocate/free setup status phase and GET_STATUS data phase requests
dynamically.  Use  one request for both cases and allocate it during bind.

CRs-Fixed: 474557
Change-Id: I5d41c310e1bb35d93b5af7d90a24ce5aab24f5f9
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Merge "USB: ci13xxx_udc: Don't free dTD immediately after active bit is cleared"