android: Update to SDK r16 and ndk r8d.

SDK r17 is out, however there it only ships a x86 system image for r16 so
it's preferable.

Change-Id: Idc4d375debf407a36c2dc6421420bdbd74ab25ca
iPod Classic/6G: fix battery voltage ADC scale

Scale battery voltage ADC readings by 1023 instead of 1000,
using ADC1 (substractor) instead of ADC0 (multiplicator) to
get better resolution.

Percent charge/discharge tables are also modified to return
a similar value than the old ones.

Change-Id: I2951c75faa02f4302599ec24f9156cfd209c36eb
iPod Classic/6G: support USB suspend mode

Actually Rockbox does not use this mode, it is supported by
other iPods, so implemented on Classic as well.

Change-Id: Ia6578506df27a95a7f7522b3034b764631a8bb3a
iPod Classic/6G: PCM support for all CS42L55 rates

pcm_dma_apply_settings(): sets the configured PCM frequency,
all native CS42L55 sample rates are available.

Change-Id: I2fcd5581457a669c3044516804cb64fb972218d0
imxtools/nwztools: fix compilation for windows

There is a windows port of the sg_utils library for scsi pass-
through. This little changes make it compile under mingw. A better
fix would be to implement direct ioctl on both windows and linux
but that's already better than nothing

Change-Id: I0d77cd1bad69806a66f0590362f165f24fa240e9
imx233: implement emi frequency scaling (disabled by default)

CPU frequency scaling is basically useless without scaling the
memory frequency. On the i.MX233, the EMI (external memory
interface) and DRAM blocks are responsable for the DDR settings.
This commits implements emi frequency scaling. Only some settings
are implemented and the timings values only apply to mDDR
(extracted from Sigmatel linux port) and have been checked to
work on the Fuze+ and Zen X-Fi2/3. This feature is still disabled
by default but I expected some battery life savings by boosting
higher to 454MHz and unboosting lower to 64MHz.
Note that changing the emi frequency is particularly tricky and
to avoid writing it entirely in assembly we rely on the compiler
to not use the stack except in the prolog and epilog (because
it's in dram which is disabled when doing the change) and to put
constant pools in iram which should always be true if the
compiler isn't completely dumb and since the code itself is put
in iram. If this proves to be insufficient, one can always switch
the stack to the irq stack since interrupts are disabled during
the change.

Change-Id: If6ef5357f7ff091130ca1063e48536c6028f23ba
imx233: modify arm cache timings on frequency switch

The manual recommands to tweak the arm cache settings on frequency
changes. The meaning of these values is undocumented but 0 seems
to be a safe value for all frequencies whereas 3 seems to be valid
only for low frequencies (<=64MHz ?)

Change-Id: Iaa8db4af8191010789cf986b1139ff259d73e2ed