R600: Expand vector FNEG
R600: Clean up extended load patterns

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Use correct LoadExtType when lowering kernel arguments

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Use the same compute kernel calling convention for all GPUs

A side-effect of this is that now the compiler expects kernel arguments
to be 4-byte aligned.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Simplify assembly for KCache registers using the TableGen !add operator

Before:

MOV * T0.W, KC0[131-128].Y

After:

MOV * T0.W, KC0[3].Y

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Use KCache for kernel arguments

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISel::Select()

This increases the number of opportunites we have for folding.  With the
previous implementation we were unable to fold into any instructions
other than the first when multiple instructions were selected from a
single SDNode.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Rename AMDILISelDAGToDAG.cpp -> AMDGPUISelDAGToDAG.cpp

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Improve support for < 32-bit loads

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Add support for 24-bit MUL instructions

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
R600: Add support for 24-bit MAD instructions

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
Don't let x86 asm printer use the no operand movsd alias. It should use the normal movsl instead.