target-ppc: Fix include for qemu_notify_event

Signed-off-by: Richard Henderson <rth@twiddle.net>
configure: Allow command-line configure for ppc32

Similar to manually selecting i386 for an x86_64 host.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Avoid code for nop move

While these are rare from code that's been through the optimizer,
it's not uncommon within the tcg backend.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Add an LK argument to tcg_out_call

This will enable the generation of tail-calls in a future patch.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Use the branch absolute instruction when possible

... before falling back to an indirect branch.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Use indirect jump threading

Indirect threading takes the same 4 bytes as the fallback form
for direct threading.  Updating 16 bytes cannot be done atomicly,
which means that even minimal threading was doomed.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Fix and cleanup tcg_out_tlb_check

The fix is that sparc has so many mmu modes that the last one overflowed
the 16-bit signed offset we assumed would fit.  Handle this, and check
the new assumption at compile time.

Load the tlb addend earlier for the fast path.

Remove the explicit address + addend and make use of index addressing.

Adjust constraints for qemu_ld64 such that we don't clobber the address
register or tlb addend before loading both values.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Convert to helper_ret_ld/st_mmu

Drop the ld/st_trampolines, loading the return address into a
parameter register directly.

Signed-off-by: Richard Henderson <rth@twiddle.net>