swap most of vmalloc for more lowmem
from what I read, the usage of lowmem causes less overhead than highmem.
sched_fair: kernel stock values
tweak dirty writeback
page-writeback.c: subtract min_free_kbytes from dirtyable memory

When calculating amount of dirtyable memory, min_free_kbytes should be
subtracted because it is not intended for dirty pages.

Addresses http://bugs.debian.org/695182

[akpm@linux-foundation.org: fix up min_free_kbytes extern declarations]
[akpm@linux-foundation.org: fix min() warning]
Signed-off-by: Paul Szabo <psz@maths.usyd.edu.au>
Acked-by: Rik van Riel <riel@redhat.com>
Cc: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Tweak deadline and sio
OMAP4: PM: Handle LPDDR CLK IO errata during suspend/idle

There is a HW bug in CMD PHY which gives ISO signals as same for
both PADn and PADp on differential IO pad, because of which IO
leaks higher as pull controls are differential internally and
pull value does not match A value.
Though there is no functionality impact due to this bug, it is
seen that by disabling the pulls there is a savings ~500uA in
OSWR, but draws ~300uA more during OFF mode.

To save power during both idle/suspend following approach taken:
 1) Enable WA during boot-up.
 2) Disable WA while attempting suspend and enable during resume.

CDDS no: OMAP4460-1.0BUG00291
(OMAP official errata ID yet to be available).

Change-Id: Ic39f17be50ff602c71e714b05af3811b35c1a67f
Reported-by: Logan Lee <hklee@ti.com>
Signed-off-by: Shashi Shekar B.S. <shashi.shekar@ti.com>
Signed-off-by: Ambresh K <ambresh@ti.com>
OMAP4: Workaround the OCP synchronisation issue with 32K synctimer.

Backport from:
http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap.git;
a=commitdiff;h=68523f4233de5f233478dde0a63047b4efb710b8

Original comment:
On OMAP4, recently a synchronisation bug is discovered by hardware
team, which leads to incorrect timer value read from 32K sync timer
IP when the IP is comming out of idle.

The issue is due to the synchronization methodology used in the SYNCTIMER IP.
The value of the counter register in 32kHz domain is synchronized to the OCP
domain register only at count up event, and if the OCP clock is switched off,
the OCP register gets out of synch until the first count up event after the
clock is switched back -at the next falling edge of the 32kHz clock.

Further investigation revealed that it applies to gptimer1 and watchdog timer2
as well which may run on 32KHz. This patch fixes the issue for all the
applicable modules.

The BUG has not made it yet to the OMAP errata list and it is applicable to
OMAP1/2/3/4/5. OMAP1/2/3 it is taken care indirectly by autodeps.

By enabling static depedency of wakeup clockdomain with MPU, as soon as MPU
is woken up from lowpower state(idle) or whenever MPU is active, PRCM forces
the OCP clock to be running and allow the counter value to be updated properly
in the OCP clock domain.

The bug is going to fixed in future OMAP versions.

Change-Id: I3c7ff239c3dcac180fcae50c1b909d417b2b8e16
Reported-Tested-by: dave.long@linaro.org
[dave.long@linaro.org: Reported the oprofile time stamp issue with synctimer
and helped to test this patch]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
OMAP2+: clock: Fix DPLL clock rounding

Function omap2_dpll_round_rate() succeeds only if it can find exact frequency.
But in current implmentations there are some frequencies that can't be rounded.
Function iterates frequencies that always lower than requested one.
For example 550MHz can be obtain from 38.4MHz reference by M=1375 and N=96,
but the closest MN pair that is tried is 1374/96.

It happens because of flooring scaled_rt_rp variable insted of rounding.
This patch should fix the issue.

Change-Id: Iceadcc695ac3376372b2fdaf29afe8f9454b891f
Signed-off-by: Taras Kondratiuk <taras@ti.com>
OMAP2+: clock: Round clock to the closest possible frequency.

Currently clock is always rounded to frequency that is <= required.
It leads to not the best divider selection if requested frequncy is
slightly lower than the closest possible frequency.

This patch makes the best possible divider to be choosen.

Change-Id: I732dbf3e2c910b041434ded0df78dd6f85b7c7f4
Signed-off-by: Taras Kondratiuk <taras@ti.com>
[IVAHD] Disable HWSUP mode and save power

Enabling HWSUP mode is somehow reducing the performance
of SL2 memory leading to increase in power consumption.
This patch disables it and advertises only SWSUP mode
which seems to improve performance and reduce power
consumed in AV record use-case.

Change-Id: Ie7d06b2a7a8d251820afd63bbb093fa34203c3fa
Signed-off-by: Sundar Raman <sunds@ti.com>
omap2plus: cpufreq: Modify lpj recalculation logic

Somethimes "mdelay" function provide delay
that several times shorter than it should be.

This happens because recalculating lpj
performed after switching OPP. In this case,
for short period of time, when OPP on MPU
was switched but lpj was not recalculated,
"udelay" function can provide incorrect
delay - upto 5 times shorter
(if OPP was switched from lowest to highest).

This patch changes lpj recalculation logic to:
if OPP will be switched to higher - recalculate lpj before switching OPP,
if OPP will be switched to lower - recalculate lpj after switching OPP.

Change-Id: I3258e756c471fd0258a849d712ab00f4e1279ea9
Signed-off-by: Sergii Postulga <x0153364@ti.com>
OMAPDSS: DISPC: Use FIR filters other than M19

Pass correct arguments to FIR filter selection.  Previously we
always ended up selecting M19 5-tap filter.

This should improve image quality of scaled layers.

Change-Id: Iabe3219df7dcfd62c713fd92ee9c3d12221bc382
Signed-off-by: Lajos Molnar <lajos@ti.com>
OMAPDSS: DSSCOMP: efficiency improvement.

This change adds 3 local caches of objects, which are used at each flip buffer
action. In original variant kzalloc()/kfree() functions are called each time
dsscomp_gralloc_queue() function is called. This meens that slab|slob|slub
common cache is used at each frame draw action. Call to kzalloc()/kfree()
result in synchronization with other code, which uses common cache, and can
result in dips in FPS, when other code allocates/frees memory.
This change improves reliability, autonomy and efficiency of DSSCOMP module.

Change-Id: Id50778f4579309fb71318a32820b9d6441a6dac1
Signed-off-by: Mykhailo Denysiuk <x0172934@ti.com>
trim /cache partition on suspend if the partition has not been trimmed for more than 15 minutes
requires fstrim binary in /sbin directory
bcmdhd: Enable Ad-Hoc (IBSS) mode

This enables Ad-Hoc (IBSS) mode for bcmdhd. We basically just need to set the
interface flag and avoid some P2P specific settings while scanning.

Also add the "station get" command for IBSS mode.

Signed-off-by: Bruno Randolf <br1@einfach.org>

Change-Id: I10a047f76495d7fedfee16d0ac10de239e494567
Linux 3.0.73
Lower smartreflex's min voltage
different dirty ratios behavior for screen-on / screen-off
smoothness for screen-on, relaxed values for screen-off
OMAP4: PM: OPP/Clock: Add virtual clocks for high IVA OPPs support

To get correct frequencies for IVA OPP higher than OPP100
IVA DPLL should be reconfigured.
Tesla is also supplied from the same IVA DPLL, so frequency on DSP
should be reconfigured together with IVAHD frequency.

This is achieved by adding virtual clocks for IVA and DSP.
Main logic is implemented in IVA virtual clock which sets
frequency for both IVAHD and DSP.
DSP virtual clock is just a dummy clock and it do nothing.

Necessary DSP OPP is set via IVA virtual clock by using DVFS framework feature:
if device on which OPP is set is not the primary device in voltage domain,
then constraint to the same OPP is set for primary device.
In case of DSP the primary device is IVAHD.

If switching to the lower OPP will cause IVA DPLL scaling up,
then frequency of IVA and DSP should be scaled down before DPLL.

Change-Id: I1b229f1d52f0f8bfa4f65f08221df1e1ba6194bc
[jagadeeshwar.reddy@ti.com: original patch author for 4430]
Signed-off-by: Jagadeeshwar Reddy <jagadeeshwar.reddy@ti.com>
[taras@ti.com: modified and extended for all OMAP44xx]
Signed-off-by: Taras Kondratiuk <taras@ti.com>

Conflicts:
	arch/arm/mach-omap2/opp4xxx_data.c
OMAP: clock: Add dummy round_rate and set_rate functions

Add functions which are going to be used by dummy virtual clocks:
long clk_dummy_round_rate(struct clk *clk, unsigned long rate)
int clk_dummy_set_rate(struct clk *clk, unsigned long rate)

Change-Id: I9bb1e886888a117548d62ef2edd9598bce2723e6
Signed-off-by: Taras Kondratiuk <taras@ti.com>