[mips][msa] Added spill/reload support


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189332 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] Added tests for and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v when non-byte vectors are used.

Note that all of these tests use ld.b and st.b for the loads and stores
regardless of the data size. This is because the definition of bitcast is
equivalent to a store/load sequence and DAG combiner accordingly folds bitcasts
to/from v16i8 into the load/store nodes to product load/store nodes with
type v16i8.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189333 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Enable local-memory-two-objects lit test

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189334 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: add natural patterns for vaddhl and vsubhl.

These instructions aren't particularly complicated and it's well worth having
patterns for some reasonably useful LLVM IR that will match them. Soon we
should be able to switch Clang over to producing this natural version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189335 91177308-0d34-0410-b5e6-96231b3b80d8