The goal of this OSHW-project is to design an FPGA-based prototyping board with 16 ADC-channels (16bit, +-10VDC), 8 DAC-chanels (16bit, +-10VDC) and some interfaces: quad RS232, single RS485, a couple of TTL I/O-pins. The resulting PCB will be an expansion board for the FPGA-Evaluation-Board made by Terasic named DE0-nano.