ARM: decompressor: reset SCTLR.TRE for VMSA ARMv7 cores.

This patch zeroes the SCTLR.TRE prior to setting the mapping as
cacheable for ARMv7 cores in the decompressor, ensuring that the
memory region attributes are obtained from the C and B bits, not from
the page tables.

Cc: Nicolas Pitre <nico@fluxnic.net>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Matthew Leach <matthew.leach@arm.com>
---
 arch/arm/boot/compressed/head.S | 1 +
 1 file changed, 1 insertion(+)
	modified:   arch/arm/boot/compressed/head.S
[RFC PATCH 2/6] ARM: mm: Add support for flushing HugeTLB pages & Updated
build_kernel.sh
	modified:   arch/arm/boot/compressed/head.S
	modified:   arch/arm/mm/flush.c
	modified:   build_kernel.sh

Conflicts:
	build_kernel.sh