msp430: add shared reference dummy module
msp430, adc: styling, add error output if sample is requested for non existing channel
msp430, adc12: fix adc get input sample call
msp430, digiIO: correctly register port j
msp430, sfr: add usci support for new sfr offset registers
msp430, models: add usci addresses+shared reference etc to CC430f6137. Correct sysrstiv base address.
msp430,portmap: only output one error for a dummy module
msp430,sysrstiv: improve support. Still mainly a dummy module for now.
msp430,uscia: add msp430_io_register_range16, because some registers are 16bit; redefine register addresses, this will work on a CC430f6137, do other msp430 have other addresses?