msm: clock-8226: Update PLL powerup sequence

Change-Id: I176ff0c295acf38dbd2c2b34fd8a108a226e5df4
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
 msm8226: touchpanel: add the reset timing

 add  the reset timing when do the synaptics_i2c_rmi4 touch probe

Change-Id: Ifab8c485c9aee9a25e36d2c426fcb07ffa296d6e
Signed-off-by: Pan Fang <fangpan@codeaurora.org>
arm/dt: msm8226: disable charging on MTPs

The MTP uses debug boards that emulate
battery presence. The SMBB peripheral
then continues to try to charge the
debug board which results in undesirable
behaviour.

Disable charging on 8x26 MTPs until this
issue has been addressed.

Change-Id: Ib7b3dcb5f5c5cd04559c1b2026f44194ed289fc2
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
Merge "msm: clock-8226: Update PLL powerup sequence"
Merge " msm8226: touchpanel: add the reset timing"
Merge "arm/dt: msm8226: disable charging on MTPs"
arm/dt: msm8226: disable charging on MTPs

The MTP uses debug boards that emulate
battery presence. The SMBB peripheral
then continues to try to charge the
debug board which results in undesirable
behaviour.

Disable charging on 8x26 MTPs until this
issue has been addressed.

Change-Id: I9da5cad8604fffb24bc217cea7cf39eeb4cf33dc
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
input: synaptics_i2c_rmi4: Add power on delay

Add proper power on delay before manipulating RESET
line.  Also increase reset delay to device maximum.

Change-Id: I610a100f09a4011d3d076701bf8a4ac0113d2ead
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
Merge "arm/dt: msm8226: disable charging on MTPs"
Merge "input: synaptics_i2c_rmi4: Add power on delay"
Revert "msm: clock-8226: Update PLL powerup sequence"
This reverts commit 83318394fe1f560101b8caba45e4b5a6f4f31e81.
Signed-off-by: Lokesh Pathak <clpatha@codeaurora.org>
Change-Id: Ia0130b6f938bfa3e46b4520d34785827f3e4a789
Merge "Revert "msm: clock-8226: Update PLL powerup sequence" This reverts commit 83318394fe1f560101b8caba45e4b5a6f4f31e81. Signed-off-by: Lokesh Pathak <clpatha@codeaurora.org> Change-Id: Ia0130b6f938bfa3e46b4520d34785827f3e4a789"
msm: clock-8226: Update DSI PLL power-up sequence

Add new power-up sequences for the DSI PLL. This is
needed to ensure that the DSI PLL locks successfully.

Change-Id: Ic64975af62783e07fa7fe11e65c9588f75451963
Signed-off-by: Lokesh Pathak <clpatha@codeaurora.org>
Merge "msm: clock-8226: Update DSI PLL power-up sequence"
msm: clock: Fix 8610 and 8226 WCNSS rf_clk lookup entry

The WCNSS on the 8226 and 8610 uses a different PMIC
XO buffer from the 8974. Fix the lookup entry to reflect
this.

Also fix the ID mappings on 8610.

Change-Id: I3e1523a7b82e0d9e52e80bdde11a6eb0ea54033a
Signed-off-by: Lokesh Pathak <clpatha@codeaurora.org>
msm: pm-8x60: Use broadcast clockevent for idle wakeup

The architected timers loses its state in certain low power modes.
In these modes, migrate the timers to use the broadcast clockevents for
scheduled wakeups.

Merging conflict, picking https://review-android.quicinc.com/#/c/298375/9

Change-Id: I414ea5a3dab69f5257da95a6847e3188f5efc6aa
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Merge "msm: clock: Fix 8610 and 8226 WCNSS rf_clk lookup entry"
Documentation: Add memory mapped ARM architected timer binding

Add a binding for the arm architected timer hardware's memory
mapped interface. The mmio timer hardware is made up of one base
frame and a collection of up to 8 timer frames, where each of the
8 timer frames can have either one or two views. A frame
typically maps to a privilege level (user/kernel, hypervisor,
secure). The first view has full access to the registers within a
frame, while the second view can be restricted to particular
registers within a frame. Each frame must support a physical
timer. It's optional for a frame to support a virtual timer.

Change-Id: I6de73d47da16ed78b33367045d24e178500d5cdd
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
arm: arch_timer: Allow mmio and cp15 timers to coexist

We need to support both instances of the architected timers at
runtime so that we can register an mmio timer as the broadcast
device. We also need to mark the cp15 timers as FEAT_C3_STOP
because they lost their state in certain low power modes.

Get rid of the pointer indirection and just have multiple
functions for the mmio and cp15 cases. We also assume that the
first frame is always available to us to simplify the logic. This
should be good enough for us for now.

Change-Id: I96f529744f9fa47c04efaf716e475267bae7043c
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
arm/dt: msm8226: Add mmio architected timer node

Add the memory mapped timers for 8226 devices.

Change-Id: Ic302fbb9faf0a46e6d1bc6aaf4fc7d21930f298f
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>