R600/SI: Use S_LOAD_DWORD instructions for v8i32 and v16i32

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193212 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add support for i64 bitwise or

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193213 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG: Pass along the original argument/element type in ISD::InputArg

For some targets, it is useful to be able to look at the original
type of an argument without having to dig through the original IR.

This also fixes a bug in SelectionDAGBuilder where InputArg.PartOffset
was not taking into account the offset of structure elements.

Patch by: Justin Holewinski

Tom Stellard:
  - Changed the type of ArgVT to EVT, so it can store non-simple types
    like v3i32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193214 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Fix handling of vector kernel arguments

The SelectionDAGBuilder was promoting vector kernel arguments to legal
types, but this won't work for R600 and SI since kernel arguments are
stored in memory and can't be promoted.  In order to handle vector
arguments correctly we need to look at the original types from the LLVM IR
function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193215 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: fix MIMG writemask adjustement

This fixes piglit:
- shaders/glsl-fs-texture2d-masked
- shaders/glsl-fs-texture2d-masked-4

Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193222 91177308-0d34-0410-b5e6-96231b3b80d8
Test commit. Added whitespace in GCOV.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193224 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Replace ffs(x) - 1 with countTrailingZeros(x)

ffs(x) broke the mingw buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193225 91177308-0d34-0410-b5e6-96231b3b80d8
Add llvm-c-test tool for testing llvm-c

This provides rudimentary testing of the llvm-c api.

The following commands are implemented:

  * --module-dump
    Read bytecode from stdin - print ir

  * --module-list-functions
    Read bytecode from stdin - list summary of functions

  * --module-list-globals
    Read bytecode from stdin - list summary of globals

  * --targets-list
    List available targets

  * --object-list-sections
    Read object file from stdin - list sections

  * --object-list-symbols
    Read object file from stdin - list symbols (like nm)

  * --disassemble
    Read lines of triple, hex ascii machine code from stdin - print disassembly

  * --calc
    Read lines of name, rpn from stdin - print generated module ir

Differential-Revision: http://llvm-reviews.chandlerc.com/D1776



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193233 91177308-0d34-0410-b5e6-96231b3b80d8
Fix check for supported targets in llvm-c lit.local.cfg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193235 91177308-0d34-0410-b5e6-96231b3b80d8
Make ARM hint ranges consistent, and add tests for these ranges

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193238 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] Added support for matching fexp2 from normal IR (i.e. not intrinsics)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193239 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] Direct Object Emission support for the LSA instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193240 91177308-0d34-0410-b5e6-96231b3b80d8