ELF Reading: skip size 0 sections

Do not load sections that would be of size 0
PVFRegs: Handle unknown registers

* Some code may touch registers that our impl does not know about
  (e.g., the CR3 register which we do not consider a GPR). For those
  registers, add a hidden column for PVF analysis just so we don't
  get invalid mem accesses during analysis.
UDIS86: support more instructions

added support for LLDT, SBB, and IN
More resilient operand size calculation

especially, deal with the case where we can't get the op size from the
instruction or the register type