MIPS: BMIPS: fix thinko to release slave TP from reset

Commit 4df715aa ("MIPS: BMIPS: support booting from physical CPU other
than 0") introduced a thinko which will prevents slave CPUs from being
released from reset on systems where we boot from TP0. The problem is
that we are checking whether the slave CPU logical CPU map is 0, which
is never true for systems booting from TP0, so we do not release the
slave TP from reset and we are just stuck. Fix this by properly checking
that the CPU we booted from (indexed as 0 in the logical map) is 0
instead of the slave CPU.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
MIPS: BMIPS: do not change interrupt routing depending on boot CPU

Commit 4df715aa ("MIPS: BMIPS: support booting from physical CPU other
than 0") changed the interupt routing when we are booting from physical
CPU 0, but the settings are actually correct if we are booting from
physical CPU 0 or CPU 1. Revert that specific change.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
MIPS: BMIPS: fix slave CPU booting when physical CPU is not 0

The current BMIPS SMP code assumes that the slave CPU is physical and
logical CPU 1, but on some systems such as BCM3368, the slave CPU is
physical CPU0. Fix the code to read the physical CPU (thread ID) we are
running this code on, and adjust the relocation vector address based on
it. This allows bringing up the second CPU on BCM3368 for instance. Make
sure that we mask all bits but bit31 when reading the thread ID in
bmips_vec.S because newer CPUs such as BMIPS4350 on BCM6368 do have bit
28 set.

Signed-off-by: Florian Fainelli <florian@openwrt.org>