msm: kgsl: initialize kgsl_sync_timeline_ops properly

CRs-fixed: 471346
Change-Id: Ib8dccb60ead6fcecc0f9beaf271ba28199d404a2
Signed-off-by: Iliyan Malchev <malchev@google.com>
Signed-off-by: Jeff Boody <jboody@quicinc.com>
msm: display: fix iommu page faults for devices with lcdc panel.

Fetch was happening from non-iommu buffer because of wrong mixer
configuration for lcdc panels.

Change-Id: Ie313ce71ff269108271437f758c0dc37884a240c
Signed-off-by: Sangani Suryanarayana Raju <csuryan@codeaurora.org>
msm: 8064-bt: Configure GPIOs for HOST_WAKE and DEVICE_WAKE for LPM

When SoC needs to send data to HOST, it wakes-up the HOST by toggling
the BT_WAKEUP_HOST GPIO Line.

HOST toggles the HOST_WAKEUP_BT GPIO Line when it wants to send data to
the SOC.

Change-Id: I5350990a2e8ff913431a4a744083ca056e5c7abe
Signed-off-by: Juffin Alex Varghese <jalex@codeaurora.org>
Bluetooth: hci_ath: Enable LPM and vote off Uart clock during sleep

When there is no communicaton between the BTHOST and BTSOC, BTSOC
should be in Low Power Mode during this time UART clock should be
vote off, otherwise Uart module will not unlock wake lock which
doesn't allow system to go sleep.

CRs-fixed: 413053
Change-Id: I8067132d5c376551bf104e69ac916addbbda3d1d
Signed-off-by: Ram Mohan Korukonda <rkorukon@codeaurora.org>
msm: clock-8960: Add 1.8MHz rate to 8064's gfx3d_clk plan

This rate will be used by the 'footswitch-8x60' driver when
controlling GFX3D power.

Change-Id: Ib796114dc90b468f1c0aa014a9db699f3b854adf
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: footswitch-8x60: Allow specification of per-fs reset delays .

Custom reset rates can be specified for clocks via fs_clk_data. If
these rates are very low, then the default reset delay of 1us may
not be sufficient. Address this by allowing custom reset delays to
be specified on a per-footswitch bases.

Change-Id: Id9b9377d79436a7fe5007a8f37216a456d66ce1a
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: footswitch-8x60: Update 8064 footswitch_enable() sequence for GFX3D .

Update 8064's GFX3D enable sequence per hardware designer recommendations
to improve system stability when responding to the inrush current event.

Differences from the standard footswitch_enable() sequence include:
 - Decreasing the reset_rate from 27MHz to 1.8MHz, and increasing
   reset_delay_us from 1us to 10us to compensate for the slower clock.
 - Enable clocks for reset propagation only after the core has been
   powered on.
 - Forcefully limit the AFAB and EBI1 clocks to a low value (decided
   by the RPM) by means of a write to the RPM_CTL RPM resource.
 - Removal of the reset toggle after powering on the core, which (while
   harmless) is not applicable to 8064.

Change-Id: I943842b56ff96b2e6077a419566d91ac184a6fda
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: footswitch-8x60: Skip GFX memory power collapse on 8064 .

Update footswitch_disable to skip GFX memory power collapse on 8064 to avoid
any voltage droop on vddmx during GFX3D footswitch toggling.

As per hardware designer recommendations this would help to improve system
stability when responding to the inrush current event.

Change-Id: Ifa2f62629f0639d29f882d009dc5f4c10da46ca8
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: display: retry sending cec message when timeout

Should retry sending cec message when there is a timeout error,
cec device might be busy at that moment.

CRs-fixed: 496344

Change-Id: I4013a795c3a885eccfc793be64cb3857941e57da
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Merge "msm: clock-8960: Add 1.8MHz rate to 8064's gfx3d_clk plan"
Merge "msm: footswitch-8x60: Allow specification of per-fs reset delays ."
Merge "msm: footswitch-8x60: Update 8064 footswitch_enable() sequence for GFX3D ."
Merge "msm: footswitch-8x60: Skip GFX memory power collapse on 8064 ."
Merge "msm: 8064-bt: Configure GPIOs for HOST_WAKE and DEVICE_WAKE for LPM"
Merge "Bluetooth: hci_ath: Enable LPM and vote off Uart clock during sleep"
msm_fb: Enable vsync irq while waiting for vsync

Enable vsync irq before waiting for vsync interrupt

Change-Id: I6dc0cdf905ee202047232868766489d90b9119c7
CRs-Fixed: 496873
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Merge "msm: display: fix iommu page faults for devices with lcdc panel."
Merge "msm_fb: Enable vsync irq while waiting for vsync"
ASoC: msm: Update the hw_ptr in the CMD_RUN response

Issue:
Write is blocked after the pause call and does not recover from the resume.
During the pause command the write dones are not acknowledged and
the hw_ptr is not incremented, hence when resume is unable to unblock the
write call.
Fix:
Update the hw_ptr in the CMD_RUN response to unblock the write call.
Update the period size to accomodate the lowest period size required in HAL
Triggering the pause in Trigger stop.

CRs-Fixed: 493270 480045 488936
Change-Id: I97fdf0fbbb78f81ad6a31f6db9bf4366a5ea7642
Signed-off-by: Aviral Gupta <aviralg@codeaurora.org>
msm: display: ensure wait_for_vsync will not hang

Make sure interrupt is enabled before waiting for vsync, add
timeout for the worst case.

CRs-fixed: 496873

Change-Id: I3b347f37fc5ec19ec0fa076465be126d784a7deb
Signed-off-by: Ken Zhang <kenz@codeaurora.org>