tcg-arm: Use ldrd/strd for appropriate qemu_ld/st64

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Rearrange slow-path qemu_ld/st

Instead of using a branch-call-branch sequence, arrange for a
call-branch sequence, using the ARM's conditional call insn.
This reduces the size of the slow-path within the TB, and makes
the GETPC_EXT implementation identical for TCG and not-TCG.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg: Add muluh and mulsh opcodes

Use them in places where mulu2 and muls2 are used.
Optimize mulx2 with dead low part to mulxh.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-mips: Implement mulsh, muluh

With the optimization in tcg_liveness_analysis,
we can avoid the MFLO when it is unused.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Implement muluh, mulsh

Using these instead of mulu2 and muls2 lets us avoid having to argument
overlap analysis in the backend.  Normal register allocation will DTRT.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg: Constant fold div, rem

Signed-off-by: Richard Henderson <rth@twiddle.net>